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AMD CEO: The Next Challenge Is Energy Efficiency

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61–70 of 328 posts

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#61

AMD is having some challenges at the moment. In particular, the RDNA3 graphics card line launch has been a dud. The Nvidia 4090 turned out to be far ahead of the AMD 7900XTX. Then there turned out to be an overheating issue on the AMD cards. And now it just looks like both Nvidia and AMD are price gouging GPU buyers instead of competing with each other. They are deliberately keeping prices high and creating artificia…

> The Nvidia 4090 turned out to be far ahead of the AMD 7900XTX. 7900XTX is on par or better than 4090 in alot of games, as well as some games favouring nvidia more than amd... (obviously not talking about Ray Tracing) Coupled with a lower price... I'm not quite sure what you're talking about since you're saying the oppisite is all reviews I've seen.

Maybe you're confusing the 4080 with the 4090?

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#62
post #12

Put another way: if AMD (and especially Intel) don't do something about this they're going to get completely eaten alive by ARM. The amount of processing power available in a modern smartphone is truly mind-boggling. I'd love to see a chart showing the chip cost and energy cost of the power on an M1 chip in each previou syear. I would guess that 30+ years ago you'd be in the millions of dollars and watts of power but…

In my experience talking to semiconductors folks, ARM is just not a concern anymore. The future is RISC-V, and ARM is already being seen as legacy tech. ARM's progress in the server space has stalled, the ARM Windows ecosystem is dead, Android has laid the groundwork for a move to RISC-V, and ARM has never and will never touch the desktop market.

Graviton, M1/M2, Ampere etc but I’m sure you’ll be able to explain why Arm is seen as ‘legacy’ tech when billions of smartphones are being shipped every year with Arm CPUs.

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#63
post #38
post #21

Earlier quoted context omitted.

If you take a Zen 3 running at optimal clocks for efficiency (such as the 5800U) the difference between its computing performance per watt is competitive with the M1 if you account for the difference in node size (which TSMC claims gives 30% less power consumption at the same performance). As the article points out, the real efficiency gains will be domain specific changes such as shifting to 8 bit for more calculati…

How would x86-64 be as efficient with the same transistor & power budget when they have to run an extra decoder and ring within that budget? Seems physically impossible.

My guess is it's related to the higher transistor count. The M1 for example has 16B transistors compared to the 5800U with 10.7B.

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#64
post #38
post #21

Earlier quoted context omitted.

If you take a Zen 3 running at optimal clocks for efficiency (such as the 5800U) the difference between its computing performance per watt is competitive with the M1 if you account for the difference in node size (which TSMC claims gives 30% less power consumption at the same performance). As the article points out, the real efficiency gains will be domain specific changes such as shifting to 8 bit for more calculati…

How would x86-64 be as efficient with the same transistor & power budget when they have to run an extra decoder and ring within that budget? Seems physically impossible.

As I understand it, the actual processing part of most chips nowadays is fairly bespoke, with a decoder sitting on top. I doubt decode can make up that large a portion of a chips power consumption (probably negligible next to the rest of the chip?), so other improvements can make up for the difference.

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#65
post #38
post #21

Earlier quoted context omitted.

If you take a Zen 3 running at optimal clocks for efficiency (such as the 5800U) the difference between its computing performance per watt is competitive with the M1 if you account for the difference in node size (which TSMC claims gives 30% less power consumption at the same performance). As the article points out, the real efficiency gains will be domain specific changes such as shifting to 8 bit for more calculati…

How would x86-64 be as efficient with the same transistor & power budget when they have to run an extra decoder and ring within that budget? Seems physically impossible.

I found this to be a pretty expansive answer to this question: https://chipsandcheese.com/2021/07/13/arm-or-x86-isa-doesnt-...

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#66
post #50

Earlier quoted context omitted.

In my experience talking to semiconductors folks, ARM is just not a concern anymore. The future is RISC-V, and ARM is already being seen as legacy tech. ARM's progress in the server space has stalled, the ARM Windows ecosystem is dead, Android has laid the groundwork for a move to RISC-V, and ARM has never and will never touch the desktop market.

If RISC-V support by Microsoft is as bad as it has been for ARM, then I'm afraid RISC-V will never touch the desktop market, at all. Contrary to ARM, which is being pushed there with great success by Apple. Server-wise of course it's a different story...

If great success to you is that they put the M1 and M2 in a tower, I don't know what to tell you. Intel, AMD, and the x86 industrial complex don't care in the slightest what instruction set your Mac runs

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#67

Earlier quoted context omitted.

Re. The “hybrid algorithms” bit: I was at this talk. The example she gave was a physics sim like CFD, iterating between a fast/approximate ML-based algorithm and slow/accurate classical physics algorithm, with the output of each feeding in as the starting point of the next round. But this was just an example, clearly there are lots of area you could apply a similar approach.

I think its also leaning into their new product MI300, which has 24 cpu cores with 8 compute dies. Both CPU and GPU (and memory) on a single package. Conventional processing + AI together. Hybrid approaches.

Yes they were really crowing about MI250X adoption and touting the upcoming MI300

Re: AMD CEO: The Next Challenge Is Energy Efficiency

#68

Earlier quoted context omitted.

Honestly I don't understand why there's not something like a 256 core ARM laptop with 4TB RAM. The benefit of ARM is scale of multitasking due to not requiring the same kind of lock states that Intel's architecture requires, and can additionally scale much better than only one physical+virtual core pair. I guess the only thing that's holding back ARM is Microsoft, as laptops are expected to run an desktop OS that peo…

> Honestly I don't understand why there's not something like a 256 core ARM laptop The high power ARM cores aren’t that small. If you took the M2 and scaled it up to 256 cores, it would be almost 7 square inches. You can’t just scale a chip like that, though, so the interconnects would consume a huge amount of space as well. It would also consume over 1000W. The latest ARM chips are great, but some times I think the…

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Re: AMD CEO: The Next Challenge Is Energy Efficiency

#69
post #32

AMD has done extremely well with multi-chip(let) modules. Zen cores & zen clusters (on Core Chiplet Die, CCD) are wonderfully small, and a huge amount of the regular stuff cores do is relegated to the IO Die (CCX), which is not as cutting edge. But wow there's a bunch of power burned on interconnect between CCDs and CCX. And now AMD's new southbridge, Promontory 21, made by Asmedia, is another pretty significant powe…

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Re: AMD CEO: The Next Challenge Is Energy Efficiency

#70
post #57

Earlier quoted context omitted.

> Put another way: if AMD (and especially Intel) don't do something about this they're going to get completely eaten alive by ARM. AMD’s latest parts are actually quite close to M1/M2 in computing efficiency when clocked down to more conservative power targets. They crank the power consumption of their desktop CPUs deep into the diminishing returns region because benchmarks sell desktop chips. You can go into the BIO…

People keep repeating that Zen4 and M1 are close in efficiency but what is the source with actual benchmarks and power measurements? At any rate, using single points to compare energy efficiency isn't a good comparison, unless either the performance or power consumption of the data points comparable. Like, the M1's little cores are 3-5x even more efficient when operating in an incomparable power class, and Apple's ow…

Generally you see this in the lower class chips that aren’t overclocked to within an inch of instability. It’s not uncommon to see a chip that uses 200w to perform 10% worse at 100w, or 20% worse at 70w.

I can’t be bothered to chase down an actual comparison, but usually you’ll see something along those lines if you compare the benchmarks for the top tier chip with a slightly lower tier 65w equivalent.

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