Earlier quoted context omitted.
> The company details a 512 GB module of DDR5 memory, running at DDR5-7200, designed for server and enterprise use. That just shows how useful ECC memory is not that these bit flips didn’t occur.
If you scroll down a bit, the article shows a slide from Samsung claiming that DDR5 improves error rates by a factor of 10^6.
ODECC was added because they wanted to be able to use DDR5 chips which would have had unacceptably large error rates without it. In other words that improvement is before the binning process, so they are selling chips with a vastly higher innate error rate to the point where the average DDR5 stick could actually be worse than the average DDR4 chip, it’s hard to say without large scale testing from multiple manufacturers.