Hacker News Board Hacker News, browsed like a classic message board
Live data from Hacker News

What happens when a CPU starts

lateblt.tripod.com

Post reply on HN
Print view View original

111–120 of 133 posts

Re: What happens when a CPU starts

#111

Post by Rimintil »

gdprrrr wrote: post #83
Rimintil wrote: post #16

> The memory chips respond by sending the contents of the selected memory cell over the data bus to the CPU. What does that ROM memory cell _physically look like_? How do we physically manipulate it to contain a 1 or a 0 (absence of something)?

Ben eater to the rescue https://www.youtube.com/watch?v=FnxPIZR1ybs

For RAM, but I was asking about ROM. Since [type]ROM keeps its state for a long-term (looks like some manufactures claim 200 years shelf life under optimal conditions), I'd imagine it wouldn't use capacitors holding an electrical charge that require any form of refresh like RAM.

Re: What happens when a CPU starts

#112

Post by Rimintil »

superasn wrote: post #30
Rimintil wrote: post #16

> The memory chips respond by sending the contents of the selected memory cell over the data bus to the CPU. What does that ROM memory cell _physically look like_? How do we physically manipulate it to contain a 1 or a 0 (absence of something)?

I found this video a long time ago about this and it's a great way to understand it if you're a visual learner https://www.youtube.com/watch?v=7J7X7aZvMXQ&t=5s

This is an excellent video of exactly how RAM works. Now to find one for the various types of ROM!

Re: What happens when a CPU starts

#113

Post by seanw444 »

fennecfoxy wrote: post #108
storklathe wrote: post #105

Could anybody clarify for me the purpose of the NOP opcode that the article refers to? I would think that something like a "do nothing" instruction would want to be optimized away as much as possible, but maybe there's some hidden facet of the instruction protocol I'm not familiar with that necessitates it?

I don't know how much it's really used these days, but when I've done asm stuff before if you have tight timing requirements in assembly, say you're bit banging an IO for some arcane serial protocol a la WS281X LED series, where it doesn't use a hardware supported serial protocol like SPI (where you can just DMA what you want to send to the controller) you then have to implement this protocol manually, in code, switc…

I believe you can get a good idea for using NOPs if you watch Ben Eater's video on implementing the RS-232 protocol.

Re: What happens when a CPU starts

#114

Post by tenebrisalietum »

uticus wrote: post #110
tenebrisalietum wrote: post #106

Earlier quoted context omitted.

- the embedded controller (EC) - the CPU core in the chipset that runs the ME/PSP - if the TPM is not an fTPM, it has a CPU I'm sure. - if your NIC has offload engines, it has a CPU or two. - each storage device has a CPU. - each Wi-Fi device has a CPU. - thunderbolt controller takes firmware, it has a CPU. I'd bet USB3 and 4 do too. - any USB device has a CPU on the other end accepting and interpreting commands. - s…

forgot memory controller https://en.wikipedia.org/wiki/Memory_controller

> Memory controllers contain the logic necessary to read and write to DRAM, and to "refresh" the DRAM. Without constant refreshes, DRAM will lose the data written to it as the capacitors leak their charge within a fraction of a second (not more than 64 milliseconds according to JEDEC standards).

Do they use CPUs now?

I did hear that IBM was developing serial RAM (not NVRAM) with an onboard controller on the memory modules - with the need for firmware. Beyond that I didn't think memory controllers ran instructions from ROM or other instruction storage like a CPU.

As far as flash memory, they definitely use a CPU and that's what I meant by "storage" in my list. :)

Re: What happens when a CPU starts

#115

Post by toast0 »

noselasd wrote: post #100
im3w1l wrote: post #87

Earlier quoted context omitted.

One thing I've always wondered about is what if you get interrupted again while you are halfway done saving registers to the stack? Like I heard something about disabling interrupts during sensitive operations like that, but wouldn't that then risk missing an event entirely instead?

One approach is to disable interrupts during these sensitive tasks yes. Once you enable interrupts again, the interrupt controller will trigger an interrupt if one occured while it was disabled, so it works out. All systems work differently though, some can't queue interrupts, meaning if 2 or more interrupts occured while disabled, you will lose those interrupts. And if interrupts can be queued, there's a finite leng…

Well said, one thing to add is it's not uncommon to have the CPU disable further interrupts as part of the automatic handling. Or it may be configurable, it's often not something the interrupt service routine needs to explicitly do; although, sometimes it is, there's so many options.

If you're on a system where interrupts are disabled automatically, and you actually do want re-entrancy sometimes, you can usually make that happen too, but you might wait until you get to a safer place (maybe switched to a kernel stack or ??? again, so many options)

Re: What happens when a CPU starts

#116

Post by Gordonjcp »

im3w1l wrote: post #87
toast0 wrote: post #40

Earlier quoted context omitted.

I dunno about the DS, which doesn't really qualify as that old to me; it's got a pretty decent sized rom for when you don't have a cartridge in, and I'd guess the SDK gives you something approaching an OS, maybe even with a threading library. But on real old hardware, you're not going to run threads or a scheduler, you're going to run one iteration of your game loop, then wait for a sign that it's time to do your gra…

One thing I've always wondered about is what if you get interrupted again while you are halfway done saving registers to the stack? Like I heard something about disabling interrupts during sensitive operations like that, but wouldn't that then risk missing an event entirely instead?

There's a flag set in hardware when /INT is asserted. At this point you can smack /INT around all you want, you're not getting any more interrupts firing.

Once you're done you clear the flag, either explicitly in the CPU's "condition code register" in some chips or by using a specific "Return from Interrupt" opcode that works like a "normal" subroutine return but clears the flag.

We use the analogy of a doorbell to describe interrupts a lot. In truth it's like if your doorbell could only be rung once, until you open and shut the door.

Re: What happens when a CPU starts

#117

Post by Gordonjcp »

tenebrisalietum wrote: post #106
rmckayfleming wrote: post #102

Earlier quoted context omitted.

A recurring question I have is: how many microcontrollers/CPUs are in a modern personal computer? There are clearly a lot, but just how many?

- the embedded controller (EC) - the CPU core in the chipset that runs the ME/PSP - if the TPM is not an fTPM, it has a CPU I'm sure. - if your NIC has offload engines, it has a CPU or two. - each storage device has a CPU. - each Wi-Fi device has a CPU. - thunderbolt controller takes firmware, it has a CPU. I'd bet USB3 and 4 do too. - any USB device has a CPU on the other end accepting and interpreting commands. - s…

> obviously printers have CPUs and firmware

Famously Apple's first laser printer had a faster 68000 than the Mac it connected to.

Re: What happens when a CPU starts

#118

Post by Gordonjcp »

saagarjha wrote: post #70

> The Z80's system, although simpler, creates a "hole" in the memory, because the bottom of the memory space is used by ROM and therefore you cannot use the beginning of the memory space for normal RAM work. Gameboy actually does a funny thing where the boot ROM gets mapped at the bottom of the address space, and then it writes to a MMIO address to unmap the ROM overlay and restore the first 256 bytes of the cartridg…

CP/M systems used to do that too, where the ROM would copy its important bits to upper memory and then swap itself out.

Re: What happens when a CPU starts

#119

Post by Gordonjcp »

Rimintil wrote: post #16

> The memory chips respond by sending the contents of the selected memory cell over the data bus to the CPU. What does that ROM memory cell _physically look like_? How do we physically manipulate it to contain a 1 or a 0 (absence of something)?

Internally? Imagine a grid of wires where each address is one vertical wire and each bit of the output is one horizontal wire. The output wires have resistors pulling them up to 5V. To select an entry in the ROM you pull its corresponding vertical wire to ground.

Now here's the clever bit - there are diodes between the vertical and horizontal wires. When you pull a vertical wire to ground it pulls all the horizontal wires connected through diodes to ground, putting a 0 on those pins.

In a real "mask programmmed" ROM the grid is more square, so there are a lot of horizontal lines grouped in 8 bit bytes.

In an EPROM the diode is replaced by a little MOSFET. By applying a high voltage to its gate it'll stay charged basically forever, switching on and forming a "0" in the output.

Re: What happens when a CPU starts

#120

Post by Dork1234 »

billti wrote: post #3

Amongst the first sentences... > It may be thought of as what happens when a whole computer starts, since the CPU is the center of the computer and the place where the action begins. I thought that too. Last year I spent a while getting as low-level as I could and trying to understand how to write a boot loader, a kernel, learn about clocks and pins and interrupts, etc. I thought, "I know, I'll get a Raspberry Pi! Th…

Might want to look at MicroPython. The ports have various init functions for various chips /system. It might not be a full OS, but it is pretty low level code you can compare to various other systems.

https://github.com/micropython/micropython/tree/master/ports

Post reply on HN