Knight’s Landing: Atom with AVX-512
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Knight’s Landing: Atom with AVX-512
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Re: Knight’s Landing: Atom with AVX-512
#2> Intel spends nearly 40% of the core’s die area to implement wide AVX-512 execution, so Knight’s Landing gets some incredibly high throughput for a low power architecture. In fact, it almost feels like a small OoO core built around feeding giant vector units
Well said!
There's some interesting details here. I love how the article tests SMT1 (aka no SMT), SMT2, and SMT4, and shows how things change. The re-order resources getting subdivided as SMT scales up is obvious but a neat hack, a real neat hack, for repartitioning core resources- on a core (Atom) that wasnt doing reordering much at all, at that point.
Also a good reminder that this almost 10 year old chip was using DDR4. I'd forgotten that DDR4 has been around for so so long!
The chip has some really monstrous capabilities. Modern flagship consumer GPUs are hitting the 1Tbps mark in memory bandwidth. AMD's upcoming Navi 3 has 96MB of L3 cache good for 5.3TB/s. Meanwhile, here's a chip that's 10 years older that has 16GB of onboard DRAM that C&C gets up to 4.5TB/s. Damn ya'll. And with huge AVX-512x2 per core, as mentioned in the top quote... this thing was such a wonderful & fascinating beast.
I didn't realize the previous incarnation- which I bought used/hella-cheap a long time ago & wanted to toy with but never did- was P54C based, aka an original-ish Pentium. That's wild.
This article is just so good. On and on, with every little characteristic and quirk. This is like a perfect "Speaking for the Dead", out of Enders Game. Alas that the world just wasn't awesome enough to put this shit to use at real volume. It's like an ultra-flexible on-the-fly reconfiguring DSP?
Re: Knight’s Landing: Atom with AVX-512
#340% of 2.93 mm2 per core is AVX-512, so 1.14 mm2. This is a large fraction, but as the article says the core is basically a minimum wrapper around the vector unit, with rather weak L1i/branch predictor/store buffers.
Let's put that in the context of modern chips. 14nm density was 44.67 MTr/mm2 so that's 50.9 MTr for AVX-512. To compare with 5nm, let's use density of TSMC N5 (138.2 MTr/mm2) to get 0.37 mm2.
So that's about 10% of an Apple M1 Firestorm core to enable 5-10x speedups vs scalar code. Sounds worthwhile to me. We can now stop saying that "AVX-512 is a huge fraction of modern cores", and "give us more cores instead". Let's instead use the hardware we have :)
Re: Knight’s Landing: Atom with AVX-512
#4Re: Knight’s Landing: Atom with AVX-512
#5Finally! One of the excellent excellent Chips & Cheese coverages of a really weird chip! Nice! > Intel spends nearly 40% of the core’s die area to implement wide AVX-512 execution, so Knight’s Landing gets some incredibly high throughput for a low power architecture. In fact, it almost feels like a small OoO core built around feeding giant vector units Well said! There's some interesting details here. I love how the…
A highly specialized processor that has very high computational throughput for specialized operations, but a quite limited scalar unit.
In both cases you really have to write software specifically for it to get it to perform with any reasonable speed. If you do that, you get great value, but any existing code will need significant modifications to perform.
Granted AVX512 is (now) more common than SPE code ever became. It is slightly better than the Itanium approach, but scalar performance (especially single threaded) will have limited the value you get from this CPU, unless you write your own software and it can utilize AVX-512.
Re: Knight’s Landing: Atom with AVX-512
#6Re: Knight’s Landing: Atom with AVX-512
#7Re: Knight’s Landing: Atom with AVX-512
#8Some comments on the submission from 16 hours back: https://news.ycombinator.com/item?id=33916480
Re: Knight’s Landing: Atom with AVX-512
#9Finally! One of the excellent excellent Chips & Cheese coverages of a really weird chip! Nice! > Intel spends nearly 40% of the core’s die area to implement wide AVX-512 execution, so Knight’s Landing gets some incredibly high throughput for a low power architecture. In fact, it almost feels like a small OoO core built around feeding giant vector units Well said! There's some interesting details here. I love how the…
Reading it, it seems very similar to the Playstation 3 Cell, with its fate mirroring it very much. A highly specialized processor that has very high computational throughput for specialized operations, but a quite limited scalar unit. In both cases you really have to write software specifically for it to get it to perform with any reasonable speed. If you do that, you get great value, but any existing code will need…
The Phi was closer to the Sun Niagara family - lots and lots of simple, slow, cores, with the note that, in the case of the Phi, the weakling x86's had mighty SIMD abilities while the Niagara had more or less standard SPARC stuff.
Neither will have amazing performance unless you have at least as many threads running as you have cores, and most of the time, at least twice as many. For single-threaded code, they were on the slow side.
Still, I always suggested people use Phis to develop because they'd get a taste of future computers. Nowadays a decent laptop will have half a dozen cores and, unless your mail client has that many threads, it'll not feel as fast as it could be.
Re: Knight’s Landing: Atom with AVX-512
#10I have a book ("Intel Xeon Phi Processor High Performance Programming") which has sat un-loved on my shelf since 2018 - alas I never got chance to play with one of these things. The last batch was put to good use by an oil and gas company though: https://www.hpcwire.com/2019/03/13/oil-and-gas-supercloud-ta...
Unfortunately, I never saw used ones on eBay.