What's different about next-gen transistors
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What's different about next-gen transistors
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Re: What's different about next-gen transistors
#2Are we ever going to circle back to the notion of creating circuits that can hold more than 2 states? We seem to be doing that for SSDs but not for logic.
Or has the space already been explored and there's nothing there?
Re: What's different about next-gen transistors
#3Are we ever going to circle back to the notion of creating circuits that can hold more than 2 states? We seem to be doing that for SSDs but not for logic. Or has the space already been explored and there's nothing there?
Re: What's different about next-gen transistors
#4Are we ever going to circle back to the notion of creating circuits that can hold more than 2 states? We seem to be doing that for SSDs but not for logic. Or has the space already been explored and there's nothing there?
Nothing I can link you, but I read about some companies trying to bring back analog computers for machine learning purposes.
Re: What's different about next-gen transistors
#5Are we ever going to circle back to the notion of creating circuits that can hold more than 2 states? We seem to be doing that for SSDs but not for logic. Or has the space already been explored and there's nothing there?
Memristor and analogue processors to accelerate ML are doing this. Neural networks are ok with operations on noisy, analogue states. Analogue operations such as op-amp multiplication are more power hungry than individual digital gates, but some are less power hungry than digital multipliers which use thousands of gates.
For digital, noise-free logic, it's generally more power efficient and physically simpler to have logic gates operate on two cleanly separated states with more gates, than to have bulkier, more complicated gates that do the same thing with combined states. A transistor which is fully on or fully off in a logic circuit uses low power either way (like a wire or a gap in the circuit), but the in-between state uses more power (like a resistor, it produces heat). This is one reason why power consumption goes up with the amount of logic state switching (the in-between resistor-like state occurs briefly during each state change), and also why many-level stable logic states aren't so efficient, except with complicated gates that use many transistors to implement many thresholds.
For non-volatile storage, that doesn't apply. Information density is more important, individual memory cells do not change state often so switching power is less of a thing per memory cell, and the logic sits at the edge of the memory array, shared among many cells. The edge circuitry can afford to be more complicated, to optimise the bulk of the memory array.
In magnetic storage and communication, the signal processing to encode many states in a small signal takes considerable power, but the trade off is worth it.
Re: What's different about next-gen transistors
#6Are we ever going to circle back to the notion of creating circuits that can hold more than 2 states? We seem to be doing that for SSDs but not for logic. Or has the space already been explored and there's nothing there?
Analog circuits exist and are widely used in some applications including for stuff like inference in AI models. The issue is that they are somewhat inexact which is a huge problem for most conventional code. As for circuits which work in a discrete rather than continuous space, it's basically always better to just use binary to represent information because 2 states are the most easily separable. Once you have to start separating out more states things get more difficult and it's almost never worth the effort unless you're trying to do stuff like storage in SSDs.
Re: What's different about next-gen transistors
#7Rabbit hole diving on the makers of the machines that make chips:
https://semiengineering.com/entities/asml/
https://en.wikipedia.org/wiki/ASM_International
https://www.asml.com/en/company/about-asml/history
From the last one, ca. 1988 ASML was failing badly:
"But in a market of fierce competition and many suppliers, the small unknown company from the Netherlands couldn’t catch a break. ASML had few customers and was unable to stand on its own two feet. Making matters worse, shareholder ASMI was unable to maintain the high levels of investment with little return and decided to withdraw, while the global electronics industry took a turn for the worse, and Philips announced a vast cost-cutting program. The life of our young cash-devouring lithography company hung in the balance. Guided by a strong belief in the ongoing R&D and in desperate need of funds, ASML executives reached out to Philips board member Henk Bodt, who persuaded his colleagues to lend a final helping hand."
(I understand that nowadays you need their equipment for new fabs.)
Re: What's different about next-gen transistors
#8Are we ever going to circle back to the notion of creating circuits that can hold more than 2 states? We seem to be doing that for SSDs but not for logic. Or has the space already been explored and there's nothing there?
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Re: What's different about next-gen transistors
#9Are we ever going to circle back to the notion of creating circuits that can hold more than 2 states? We seem to be doing that for SSDs but not for logic. Or has the space already been explored and there's nothing there?
The Intel 8087 and iAPX432 could store 2 bits per transistor in ROM
Re: What's different about next-gen transistors
#10Random semi related question about chip making: AFAIK CPU's have multiple layers, not just a single silicon layer of transistors. And also, making transistors involves doping the silicon with other elements. And lithography is about shining a laser through a mask. And all this starting from an already cut silicon wafer.
So how are the multiple layers done, if light is shined on the surface, how do you reach the other layers? And how is this doping done, you also need to choose what element goes where but this couldn't be done with light and a mask I'd think (so even if single layer I wonder how this works)? And how do you reach the other layers with those chemical elements for doping?