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F4PGA: Open FPGA Tooling: Xilinx 7-Series, Lattice iCE40/ECP5, QuickLogic EOS S3

f4pga.org

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Re: F4PGA: Open FPGA Tooling: Xilinx 7-Series, Lattice iCE40/ECP5, QuickLogic EOS S3

#3
Anyone here ever try using this for only place and route, while sticking to the proprietary tools for synthesis and bitstream generation? I'm honestly not even sure how you'd start (generate xdc and edif in vivado, convert to more common formats, and somehow get timing information?). I get the impression a lot of emphasis is put on bitstream generation when it comes to open source fpga stuff. However, it seems like that's probably not where the real gains are for build time in any production system. Especially since there's no OSS supporting bitstream generation for the highest end boards anyway.

Re: F4PGA: Open FPGA Tooling: Xilinx 7-Series, Lattice iCE40/ECP5, QuickLogic EOS S3

#4
The sorry landscape of open source FPGA tools has kept me away from them whenever possible.

Programmable IO such as RP2040 (Raspberry Pi Pico) are eating a tiny (but increasing) part of FPGA lunch.

Altera (well, Intel) and Xilinx (well, AMD) are just hurting themselves by not working to move towards an open ecosystem.

Edit: Oh, so AMD is partially behind F4PGA. Well, points for them, perhaps it's time to move away from Altera altogether?

Re: F4PGA: Open FPGA Tooling: Xilinx 7-Series, Lattice iCE40/ECP5, QuickLogic EOS S3

#5

Anyone here ever try using this for only place and route, while sticking to the proprietary tools for synthesis and bitstream generation? I'm honestly not even sure how you'd start (generate xdc and edif in vivado, convert to more common formats, and somehow get timing information?). I get the impression a lot of emphasis is put on bitstream generation when it comes to open source fpga stuff. However, it seems like t…

How do you want to do place and route for the high end boards that are not open/reversed anyway? Related to the gains, I don't think bitstream generation is the biggest emphasis, its just a no-brainer after you have everything reversed and can do place&route in OSS.

Re: F4PGA: Open FPGA Tooling: Xilinx 7-Series, Lattice iCE40/ECP5, QuickLogic EOS S3

#8
post #7
post #6

If only it were possible to buy such chips.

https://www.crowdsupply.com/search?q=fpga There's a good number of open source boards with relatively active communities.

I have my own boards, I need only chips. Looked at Spartan 7 from Mouser today. Initial happiness disappeared when I realized, that it’s January 2024 and not 2023.

Re: F4PGA: Open FPGA Tooling: Xilinx 7-Series, Lattice iCE40/ECP5, QuickLogic EOS S3

#9

Anyone here ever try using this for only place and route, while sticking to the proprietary tools for synthesis and bitstream generation? I'm honestly not even sure how you'd start (generate xdc and edif in vivado, convert to more common formats, and somehow get timing information?). I get the impression a lot of emphasis is put on bitstream generation when it comes to open source fpga stuff. However, it seems like t…

I agree it would be great for users to be able to mix and match EDA tools, but EDA tool vendors seem to disagree, and consider the state of poor interoperability among EDA tools as a nice barrier to entry. As far as I can tell open source tools work on bitstream generation because it is unnecessarily painful to interoperate with proprietary tools.

Re: F4PGA: Open FPGA Tooling: Xilinx 7-Series, Lattice iCE40/ECP5, QuickLogic EOS S3

#10
post #8
post #7

Earlier quoted context omitted.

https://www.crowdsupply.com/search?q=fpga There's a good number of open source boards with relatively active communities.

I have my own boards, I need only chips. Looked at Spartan 7 from Mouser today. Initial happiness disappeared when I realized, that it’s January 2024 and not 2023.

Ah I see, yeah getting components nowadays is a challenge.
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