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Micron's 232-layer NAND enables 2TB flash chips that deliver data 50% faster

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Re: Micron's 232-layer NAND enables 2TB flash chips that deliver data 50% faster

#21

Post by Dylan16807 »

ksec wrote: post #14

A much better article on Anandtech [1]. Dual Stack 116 Layers. And as noted inside the article 100+ layer per stack isn't exactly new. Personally I am interested in Cost per Bit reduction. Hopefully there will be news in Flash Memory Summit new week. I wouldn't mind to have a slow 100 write cycle NAND that cost a third of today's price. Think 2TB USB Stick for $49. [1] https://www.anandtech.com/show/17509/microns-232…

What manufacturing changes do you imagine would make that possible? Making cells smaller gets unusable pretty quickly, and adding more bits to TLC/QLC is a mild price improvement at best.

Prices will go down over time as manufacturing improves, but if you're waiting for that then you don't need to sacrifice speed and durability.

Re: Micron's 232-layer NAND enables 2TB flash chips that deliver data 50% faster

#22

Post by cowtools »

gruez wrote: post #17
cowtools wrote: post #15

Earlier quoted context omitted.

1k writes sounds good enough for consumer hardware I suppose. As long as there's some some type of S.M.A.R.T. system to warn the user before it wears out.

usually it goes into read-only mode when it wears out, so there's no data loss.

that's fantastic actually! One problem might be that programs don't anticipate this behavior, like if it wears out while a filesystem is still syncing

Re: Micron's 232-layer NAND enables 2TB flash chips that deliver data 50% faster

#23

Post by [deleted] »

hinkley wrote: post #6
lazide wrote: post #4

Earlier quoted context omitted.

Keep in mind, these are layers of cells, not multi-level cells. Each of the layers has an individual multi-level cell. That said, Samsung quad-level cells only have 1k write lifetime, so likely not far off.

I love how someone said there's a septuple-level cell out there... but you have to immerse it in liquid nitrogen for it to work.

[deleted]

Re: Micron's 232-layer NAND enables 2TB flash chips that deliver data 50% faster

#24

Post by Zandikar »

dtgriscom wrote: post #18
ksec wrote: post #14

A much better article on Anandtech [1]. Dual Stack 116 Layers. And as noted inside the article 100+ layer per stack isn't exactly new. Personally I am interested in Cost per Bit reduction. Hopefully there will be news in Flash Memory Summit new week. I wouldn't mind to have a slow 100 write cycle NAND that cost a third of today's price. Think 2TB USB Stick for $49. [1] https://www.anandtech.com/show/17509/microns-232…

I suspect it would be difficult to properly balance writing across blocks with only 100 cycles before wearout.

Depends. If you're trying to use it as a drop in replacement for a Scratch/Boot/Database drive, sure. That'd probably not be a good plan. But if you consider HDD's are primarily deployed in WORM or WFRM (Write Few, Read Many) work loads these days, a 100 P/E cycle NAND flash that has comparable $/TB value to spinning disk could definitely have a viable market.

It'd be kinda like Flashes version of Shingled HDD's. Got be a bit more careful with their usecase, can't just drop them in whereever and expect it all to work fine, but as long as you use them in WORM/WFRM, they'd be excellent for greater physical data density and far superior power efficiency.

Re: Micron's 232-layer NAND enables 2TB flash chips that deliver data 50% faster

#25

Post by TapamN »

dtgriscom wrote: post #18
ksec wrote: post #14

A much better article on Anandtech [1]. Dual Stack 116 Layers. And as noted inside the article 100+ layer per stack isn't exactly new. Personally I am interested in Cost per Bit reduction. Hopefully there will be news in Flash Memory Summit new week. I wouldn't mind to have a slow 100 write cycle NAND that cost a third of today's price. Think 2TB USB Stick for $49. [1] https://www.anandtech.com/show/17509/microns-232…

I suspect it would be difficult to properly balance writing across blocks with only 100 cycles before wearout.

For some kind of write once archival storage, it would probably still have a use. But with flash that fragile, I'd be worried about how sensitive to read disturb it would be.

Re: Micron's 232-layer NAND enables 2TB flash chips that deliver data 50% faster

#27

Post by blibble »

cowtools wrote: post #22
gruez wrote: post #17

Earlier quoted context omitted.

usually it goes into read-only mode when it wears out, so there's no data loss.

that's fantastic actually! One problem might be that programs don't anticipate this behavior, like if it wears out while a filesystem is still syncing

all modern filesystems are either journalled or always consistent on disk, so shouldn't be a problem if it dies during

worst case you have to copy it to another disk and replay the journal

Re: Micron's 232-layer NAND enables 2TB flash chips that deliver data 50% faster

#28

Post by Melatonic »

ksec wrote: post #14

A much better article on Anandtech [1]. Dual Stack 116 Layers. And as noted inside the article 100+ layer per stack isn't exactly new. Personally I am interested in Cost per Bit reduction. Hopefully there will be news in Flash Memory Summit new week. I wouldn't mind to have a slow 100 write cycle NAND that cost a third of today's price. Think 2TB USB Stick for $49. [1] https://www.anandtech.com/show/17509/microns-232…

I am really interested long term in longevity. I am sure they will keep increasing speeds and decreasing prices but what about this stuff wearing out? NAND that can last for as long as a well cooled and unstressed CPU would be epic!

Re: Micron's 232-layer NAND enables 2TB flash chips that deliver data 50% faster

#29

Post by ksec »

Dylan16807 wrote: post #21
ksec wrote: post #14

A much better article on Anandtech [1]. Dual Stack 116 Layers. And as noted inside the article 100+ layer per stack isn't exactly new. Personally I am interested in Cost per Bit reduction. Hopefully there will be news in Flash Memory Summit new week. I wouldn't mind to have a slow 100 write cycle NAND that cost a third of today's price. Think 2TB USB Stick for $49. [1] https://www.anandtech.com/show/17509/microns-232…

What manufacturing changes do you imagine would make that possible? Making cells smaller gets unusable pretty quickly, and adding more bits to TLC/QLC is a mild price improvement at best. Prices will go down over time as manufacturing improves, but if you're waiting for that then you don't need to sacrifice speed and durability.

>Prices will go down over time as manufacturing improves

That is not always true though. If we look at DRAM. There is a reason why we are still stuck with 8GB DRAM as entry level while 99.99999% of tech community including HN has been stating DRAM is cheap and it is only going to be cheaper for more than a decade. The cost to produce DRAM has only dropped 10-20% over the past decade, while pricing fluctuate a lot as with any commodity. Microsoft knew this way back in 2006 ( or even earlier ) when they were designing Xbox.

>What manufacturing changes do you imagine would make that possible?

AFAIK, Not any time soon. You could probably read up on all the issues on thememoryguy [1] or SemiEngineering [2]. But even PLC wouldn't bring that much cost savings, if there are any. There is nothing on the roadmap for the next 5 years. Not even in R&D Labs which suggest it may not even happen in 2030. That is why I am hopping for some news, some progress like [3].

[1] https://thememoryguy.com/how-3d-nand-makes-qlc-and-plc-feasi...

[2] https://semiengineering.com

[3] https://ieeexplore.ieee.org/document/9830513

Re: Micron's 232-layer NAND enables 2TB flash chips that deliver data 50% faster

#30

Post by femto »

ineedasername wrote: post #26

Is there a (known) theoretical limit on density/mm^3?

The Bekenstein bound? A maximum number of bits can be placed on the surface of sphere. Beyond that it turns into a black hole.

Mind you, one or two other practical limits might come into play before a memory chip hits that one. :-)

[1] https://en.wikipedia.org/wiki/Bekenstein_bound

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Edit:

The maximum information capacity of a radio antenna is limited by the surface area enclosing the antenna. One could theorise that that in addition to a maximum density of information storage there will also be a limit on the error free rate at which information can be sent to/from a storage system system, probably related to the surface area enclosing the system.

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