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Motorola 6800

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61–70 of 127 posts

Re: Motorola 6800

#61
post #9

I built a small multitasking kernel with a friend with a 68000 (m68000) in college. We implemented it on breadboards, I think with 30 or so feet of jumpers [0]. I had very little prior embedded experience, so it was trial by fire. It was a wonderful introduction to how kernels work (or at least concurrency and scheduling) at their most basic level, without having to deal with the complexity of virtual address spaces,…

> "Test condition, decrement, and branch". All in one instruction The Z80 had that too - DJNZ (Decrement and Jump if Not Zero). Standard way of writing loops.

DJNZ only does the decrement and branch if zero part. That's implicit in DBcc, which also initially checks the condition and is equivalent to NOP when true.

Re: Motorola 6800

#62
post #5

Earlier quoted context omitted.

Some of that can be gleaned from this benchmark, published in Byte, in 1981: https://en.wikipedia.org/wiki/Byte_Sieve Results for a few 8/16 bit processors are here (and on subsequent pages): https://archive.org/details/byte-magazine-1981-09/page/n193/...

I ran the C version of this benchmark using llvm-mos's Clang for the 6502. The results: 21.4 seconds 5793 bytes Which is middle of thepack for the Z80 benchmarks, but well below the 6502 ones. We're also using a slightly tweaked embedded printf written in C, so this could probably be improved somewhat there, sans any compiler changes.

Wow, I didn't realise there was a project to add a 6502 target to LLVM. Now to get Rust working...

Re: Motorola 6800

#63
post #33

Aha, an 8-bit CPU post that isn't about the 6502 or Z-80!

Where’s the 8051 love?

The 8051 hasn't ever gone away - Wikipedia lists a number of MCU families that are still an 8051 core, and it's certainly incomplete - https://en.wikipedia.org/wiki/Intel_8051#MCUs_based_on_8051

Re: Motorola 6800

#64
Where does “6800” come from? I loved my Amiga and it had an MC68000 so I guess they just tacked on a zero for the 16-bit generation, but how were their series originally named?

Re: Motorola 6800

#65
post #9

I built a small multitasking kernel with a friend with a 68000 (m68000) in college. We implemented it on breadboards, I think with 30 or so feet of jumpers [0]. I had very little prior embedded experience, so it was trial by fire. It was a wonderful introduction to how kernels work (or at least concurrency and scheduling) at their most basic level, without having to deal with the complexity of virtual address spaces,…

I built a multi tasking kernel for the 6809, which was an extended version of the 6800 rather than the 68000 series, which is quite a different kind of a CPU. It was fun! Also created a double sided PCB using laser printers and then ironing the layout onto photo etching PCBs.

Re: Motorola 6800

#66
One of the fellows at high school talked about and I think brought along a DREAM-6800 computer [0] It was published as a project kit by the Electronics Australia magazine. That said the Apple ][ and TRS-80 seemed way more functional. It wasnt until a few years later at Uni that I got to really enjoy low-level programming and working directly with I/O.

(I think the guy with the DREAM-6800 ended up making a motza making poker machines)

[0] http://www.mjbauer.biz/DREAM6800.htm

Re: Motorola 6800

#67
post #9

I built a small multitasking kernel with a friend with a 68000 (m68000) in college. We implemented it on breadboards, I think with 30 or so feet of jumpers [0]. I had very little prior embedded experience, so it was trial by fire. It was a wonderful introduction to how kernels work (or at least concurrency and scheduling) at their most basic level, without having to deal with the complexity of virtual address spaces,…

> "Test condition, decrement, and branch". All in one instruction The Z80 had that too - DJNZ (Decrement and Jump if Not Zero). Standard way of writing loops.

PowerPC bdnz says hi, though it is restricted to one special purpose register (CTR, the counter).

Re: Motorola 6800

#68
post #13

Earlier quoted context omitted.

Well, it was the predecessor :)

There was the 6809 in between. I remember BYTE magazine's cover story, "A Microprocessor for the Revolution". Well, not quite, as it turned out! :)

The 6809 was used in a production gadget, the Vectrex, the only vector-graphic consumer videogame console. It came with a screen that worked like an oscilloscope -- no raster, just an electron beam sweeping along the line. So, no jaggies.

As it was necessarily monotone, games came with clear plastic color overlays for the screen.

6809 was notable as the first 8-bit microprocessor with a multiply instruction: 8x8->16 bits.

Re: Motorola 6800

#69
a lot of pinball machines are based on the 6800. i've been really impressed by one project that replaces the 6800 with an avr by just wiring up all the relevant pins and holding the 6800 in halt:

https://github.com/BallySternOS/BallySternOS

i've started working on a derivative project using an rp2040 instead of the avr with hopes of offloading the 6800 bus work to a pio

Re: Motorola 6800

#70

With the optics of _compiled_ code, how do the various 8-bitters stack up? (6809/6811, 65C02, Z80, H8, ...)? One would have to account for the frequency allowed by the ISA at iso-technologies (which makes including AVR somewhat tricky). I only have experience with Z80 and 65C02 and I believe the consensus is that a 4 MHz Z80 beats a 2 MHz 65C02, but neither is a particularly nice compiler target.

I just don't think any of the 8-bits made good compiler targets. At least not C compilers. Not enough registers, even in the 6809.

C compiled for the 6502 would use the zero page (first 256 bytes of RAM) as registers, and use the actual registers just to run instructions of a higher-level abstract machine that, e.g., understood 16-bit numbers. Kind of like Xerox Alto, in that particular way; on the Alto, only device drivers were coded native.

There was a C compiler that kept one of the 6502 index registers zero at all times, just to have a zero handy.

This use of a little interpreter to provide a higher-level instruction architecture to program to was really, really common in the 50s and 60s. The Apollo AGC computer that landed on the moon was mostly programmed that way. It seems surprising that with memory so tight, they would use up so much of it for the virtual machine interpreter, but instructions for that could be much more compact than native code. It made a slow computer even slower, but they all felt fast back then.

Steve Wozniak burned a little interpreter like that into the Apple ][ ROM, just smart enough for dumb jobs like copying blocks of memory. It used a reserved fragment of the zero page as its registers.

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