91–100 of 152 posts
Earlier quoted context omitted.
Indeed, my impression has been that C++ is as high-level as you want it to be.
My impression of C++ is that you have to write multiple constructors before you can implement any logic.
Earlier quoted context omitted.
This is part of why Intel acquired Altera. On the other end of the spectrum, some of the latest AVR families have configurable glue logic akin to a tiny PLD.
In the same vein, the Raspberry Pi RP2040 has what they call Programmable IO modules which are tiny cores that can run small state machines doing whatever you want, separate from the main ARM cores.
Pretty cool though, you can write VGA drivers with it apparently!
Life is weird, I was just using this site yesterday to do some electrical diagrams for a wiring harness I am building for my ancient mobile. My trouble was understanding how to flow something through a series of relays, and implementing "AND" and "OR" logic with a relay series. if(AC && Temp > 160) { run both fans } if(AC || Temp > 160 { run both fans at reduced speed } Now, the AC is already a relay, but you can jus…
Haven't used it personally...but it looks nice.
All games were pong like graphics quality.
While I never implemented any of them, it was an interesting source of knowledge while learning electronics.
In the year 1974, Practical Wireless, a UK magazine, published a design for a pong game that connects to a television, called PW Tele Tennis. It uses sixty four NAND gates, twelve NE555 timers, two dozen diodes and some analog parts. It's about the most basic version of the game. They later published a sound effects board and an on-screen scoring board that uses a couple of dozen more chips. http://searle.x10host.com…
In my EE degree (in year 2000), we had to implement something with external I/O as a state machine using logic gates (it was in an FPGA though, we drew the schematic). Pong is a way cooler exercise than whatever I did with a 7 segment display and a keypad. But the idea of state machines is still a big part of introductory digital logic.
Later on digital circuits, we got to design basic CPUs, with optional breadboard implementation, but no one bothered to go that far for optional stuff.
Earlier quoted context omitted.
PLDesque glue logic is cool, but the coolest thing I've seen is uC's with fully programmable pins, so eg the DAC device inside the chip can be connected to any of the external pins, making board layout dramatically simpler.
I'm guessing you've seen the Infineon (formally Cypress) PSoC [0] stuff too? Both analogue and digital peripherals that can be configured mostly arbitrarily. There are also some neat mixed-signal parts from Dialog [1] - no MCU but interesting analogue and digital blocks all the same. [0] - https://www.infineon.com/cms/en/product/microcontroller/32-b... [1] - https://www.dialog-semiconductor.com/products/greenpak
Earlier quoted context omitted.
What’s even more, is we can make higher frequency chips, it just turned out higher density gates was the easier path to go down. If the gates path reaches its end, we can still go back to clock. It won’t be easy or cheap to solve all the clock problems, but if it’s better than the alternative someone will do it (like how fracking only became viable as a means of drilling oil once the cheap, easy to get oil was somewh…
By the way, why did clock frequency stop around 3-4 GHz? I assume that as transistors become smaller, their propagation delay decreases, as their power consumption, and it allows to use higher clock frequencies. Is there something else that I am missing?
https://hothardware.com/news/amd-computex-taipei-2022-keynot...
Earlier quoted context omitted.
While it has nothing to do with my current work, introductory digital systems was definitely one of my favorite classes. It was amazing to go from logic gates to adders and muxes and whatnot, to state machines, flip-flops, and useful computation. Now I work in software, and although it doesn't really come up, it's very satisfying to understand down to first principles how computers can be built up from the gate level…
This takes me down memory lane. Anybody remember Karnaugh maps?
I implemented Conways Game of Life in TTL and oscilloscope for my 1975 MIT digital circuits lab. The clock was 6 nanoseconds or 166 MHz. The limiting chip was one kilobit RAM which was in tight supply and expensive. I think we used two for alternating generations. There are similarities to the pong circuit.
My biggest problem was that I hadn’t yet learned to pick minimum viable projects that would still result in a good grade.
Never saw it in person, but so the story goes....