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Intel's New Chimera: Alder Lake

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201–210 of 253 posts

Re: Intel's New Chimera: Alder Lake

#201
post #193

Earlier quoted context omitted.

LOL yeah. More powerful, i.e. it consumes more power. Fun fact: the M1 big core caps itself around the same wattage where most Intel SKU consider the core to be below stock wattage. As in, in order to achieve your “more powerful” claim, it takes Intel cores 2-7x the watts, depending on the workload, to eek out a marginal performance uplift… or sometimes just to match the M1. Nobody in CPU design cares about unconstra…

Ok, so when Intel and AMD get on 5nm equivalents and their chips are both more powerful and efficient than the 5nm Apple chips, you'll issue a mea culpa here, right? The fanboyism runs so deep it's amazing. Let's compare PS5 to GameCube next and talk about Sony's great engineering advantage

And when it doesn’t, will you apologize for calling everyone else a fanboy because they don’t buy into your excuses?

Go compare the perf/power curves of the alder-lake cores (both P/E) versus the last-gen Apple cores from TSMC n7+. TSMC n7+ is roughly comparable to Intel 10nm ESF in transistor performance, so it is a fair comparison.

Do your research then get back to me about how the process is entirely responsible for every perf/power difference and we (the silicon design teams) are just identical robots doing the same thing across the board in every company.

I do like how you claim there is no design magic sauce, but then Apple will lose big when Intel/AMD come out with their 5nm equivalents, as in, they found some magic sauce? WTF?

Re: Intel's New Chimera: Alder Lake

#202
post #64

Earlier quoted context omitted.

Single core performance is so much more important for most workloads (and harder to achieve) than higher core count.

I think it’s a real shame we haven’t learned to use more threads and cores in our software. It’s not like having dozens of small cores is something new.

I wonder if we’ll see more of a movement towards virtual threads Java Loom style where cheap threads in the language and cheap cores on the cpu will combine to create a programming style where you’ll just dispatch little worklets all over the place without worry about “is this a large enough amount of work to justify a thread” the way we do now. I also wonder if that will cause a trend towards optimizing startup latency in both language threads and the efficiency cores.

Re: Intel's New Chimera: Alder Lake

#203

Earlier quoted context omitted.

> I don’t completely agree. A MacBook Air M1 is 25% faster than a 10th generation Intel 10700K Why is everyone insistent on comparing Apple’s latest CPUs to Intel’s parts from multiple generations back? Intel is on 12xxx series now. AMD also has new generation laptop CPUs that perform very well. Let’s compare to those. The M1 is power efficient but much of that is due to the TSMC process they used. I really don’t und…

Because that’s what I had access when I did the tests. I’ll do a series of tests on our cluster and post these. Will these be meaningful for you? The thing is, M1 on air is a relatively low clock speed CPU with passive cooling. 10200K is actively cooled, unlimited beast of its generation. The libraries I use are X86 optimized. Yet the code I’ve written is 25% faster on ARM. This is significant .

> 10200K is actively cooled, unlimited beast of its generation

Curious what you meant here since that part doesnt exist, and if it did it would be near the bottom of the stack for the generation (101xx and 103xx are the low core count i3 and i5 parts).

Re: Intel's New Chimera: Alder Lake

#204
post #201

Earlier quoted context omitted.

Ok, so when Intel and AMD get on 5nm equivalents and their chips are both more powerful and efficient than the 5nm Apple chips, you'll issue a mea culpa here, right? The fanboyism runs so deep it's amazing. Let's compare PS5 to GameCube next and talk about Sony's great engineering advantage

And when it doesn’t, will you apologize for calling everyone else a fanboy because they don’t buy into your excuses? Go compare the perf/power curves of the alder-lake cores (both P/E) versus the last-gen Apple cores from TSMC n7+. TSMC n7+ is roughly comparable to Intel 10nm ESF in transistor performance, so it is a fair comparison. Do your research then get back to me about how the process is entirely responsible f…

Yes, if Intel on 5nm does not meet or exceed M1 on both perf and efficiency I will come back here and apologize

Re: Intel's New Chimera: Alder Lake

#205

Earlier quoted context omitted.

I should not like to have to read that document.

That's a fair point, although some people do constantly multitask. I have ADHD and I'm capable of doing work while focussing entirely on two tasks, often I'm looking at one screen where I'm writing code while reading an article on another screen. Sometimes I feel like "reality" is too slow and I've already figured out the code for the unit test (or whatever I'm working on) in my head and I'm impatiently waiting for m…

Do you take Vyvanse? That is what I take. It makes a world of difference!

Re: Intel's New Chimera: Alder Lake

#206
post #116

Earlier quoted context omitted.

Video encode is also hardware-accelerated these days. J5005 may be Nehalem performance but unlike Nehalem it has a hardware video encoder onboard. Intel has had it for a long time, I think maybe back to Sandy or Ivy days so it’s basically in everything at this point. It’s not archival quality but it’s more than fine for videoconferencing starting from around Haswell. Goldmont actually has a fairly modern media block…

> It’s not archival quality but it’s more than fine for videoconferencing starting from around Haswell. My 2015 MacBook Pro with Broadwell i5 would indeed work "fine" for videoconferencing (in my case Google Meet), but it would also use most of a CPU core to do it. Which is fine if that's all you're doing. But if I wanted to share my screen and work on something else while doing so then it could quite quickly get to…

It looks like Google Meet uses VP9, which certainly is not accelerated on 2014 CPUs.

Re: Intel's New Chimera: Alder Lake

#207
post #86

I may be way off here, but to me the transition to heterogeneous cores is more of a long term than short them play, anticipating the era where we'll have different kinds of cores in our systems. Even the performance cores of today have circuitry that's there to make certain workloads faster (video decoding, crypto operations, etc.). Other stuff has mostly been offset to the GPUs (actual grahphics-related stuff, machi…

Intel CPUs already have video encoding/decoding cores built into the iGPU. Though they don’t allocate nearly the space to GPU that they could. It does provide power advantages more than performance. The downside is that it’s much harder to improve the algorithms after they ship.

Luckily video codecs also hardly change in an incompatible way after they ship. There's also varying levels of support that can be fully or partially HW decode/encoded and the pure CPU fallback.

Intel's Quicksync is best-in-class and even available on low power Celeron/Atoms

Re: Intel's New Chimera: Alder Lake

#208
post #203

Earlier quoted context omitted.

Because that’s what I had access when I did the tests. I’ll do a series of tests on our cluster and post these. Will these be meaningful for you? The thing is, M1 on air is a relatively low clock speed CPU with passive cooling. 10200K is actively cooled, unlimited beast of its generation. The libraries I use are X86 optimized. Yet the code I’ve written is 25% faster on ARM. This is significant .

> 10200K is actively cooled, unlimited beast of its generation Curious what you meant here since that part doesnt exist, and if it did it would be near the bottom of the stack for the generation (101xx and 103xx are the low core count i3 and i5 parts).

I meant 10700K.

Written that comment on mobile on a plane, before take-off, so I either typo'd and didn't see, or auto-correct changed it deeming 10200K is more correct than 10700K.

If you look to the original comment where I sparked the discussion, I've mentioned it as 10700K already.

Re: Intel's New Chimera: Alder Lake

#209
post #172

Earlier quoted context omitted.

I'm not telling that process difference isn't the part of the picture, but the process difference is at most half of the story. Working on HPC field and with generations and generations of Intel hardware, I can tell you that two node difference (alone) never gives you 25% real world performance in the realm of Intel, let alone theoretical.

This isn't a normal die shrink though. This is jumping from Intel's heroically old 14nm+++++++++++++++ to a brand spanking new TSMC process. It might be on the order of 4 to 6 times denser.

I'm all for competition to be honest. While Intel is the least favorite CPU maker of mine (due to their unethical moves in the past), I'd love to see fierce competition rather than a single dominant power.

We've seen how the latter went until AMD came back to the game.

Re: Intel's New Chimera: Alder Lake

#210
post #2

I don't have an idea on CPU design. Can this lead to M1 like performance?

I think the article is is saying it won’t lead to much of anything except headaches.

That's the impression I got as well. That made me discount Agner's arguments since they apply to Apple's M1, and the M1 is great in both raw performance and power efficiency.
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