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Intel's New Chimera: Alder Lake

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Re: Intel's New Chimera: Alder Lake

#32

Earlier quoted context omitted.

> because I sure would love to have more cores available (currently rocking a 32 core Threadripper) wtf do you need more cores for??? Wat are you doing? > not interested in actually pushing HEDT forward since consider buying a server.

Some of us write software for a living. You give me two more cores, I'll use them.

I'm a dev too, my machine is a dual core haswell.

It depends very much what you're doing of course (compiling linux kernel repeatedly perhaps) but if you have a little you can get a heck of a lot out of it with experience, although you surely will hit a wall sometime. But 32 cores not enough is just unimaginable for me.

Re: Intel's New Chimera: Alder Lake

#33
Just trying to figure this out.

So the low power high power cores do seem to be inspired by the M1. If they can implement that easily in x86 is another thing but if anyone can Intel can I guess.

The half prescion fps are obviously aimed at ML but how on earth are the hoping to compete with gpus on this front? Where is the use case on this (genuine question).

The complex numbers bit makes me think of quantum circuit simulation (but that could be bias on my part as that's what I'm looking at). But this is a relatively small field at the moment, and just through normal use nvideas backend simulator blows cpu performance out of the water (both for speed and number of qubits simulated).

I assume I'm missing the point here and it is heavily used in compression or something but again if someone had an idea of the usecase for complex number instructions that would be useful! Thank you

Re: Intel's New Chimera: Alder Lake

#34

Earlier quoted context omitted.

> because I sure would love to have more cores available (currently rocking a 32 core Threadripper) wtf do you need more cores for??? Wat are you doing? > not interested in actually pushing HEDT forward since consider buying a server.

I see nothing particularly hard in utilising 32 cores. When I launch all the services in the project I’m working on my os has plenty work to schedule. Right now I have 3732 threads running on my machine. It’s totally separate question if OS can schedule so many threads effectively on so many cores, and how much coordination overhead there will be. But that’s just something we have to figure out and fix.

I'm interested, what are you doing that can eat all those cores>

Re: Intel's New Chimera: Alder Lake

#35
post #25
post #15

Other than obvious stuff like differences in features (AVX512 - although I thought that wasn't even officially supported at one point even though they haven't disabled it?) between the P and E cores, how does ARM manage it with big/LITTLE cores? Surely that's similar to a degree (Out of order P cores, in order E cores) to what Intel are attempting? Are Intel just taking it too far in terms of disparity between the ar…

On an android device I worked on some 5 years ago (so might be out of date) it used a simple cpu mask. Background tasks always used only the little cores, foreground apps always always used only the big cores. I do not believe it was possible for a single app to run threads on both big and little cores. And my understanding is that every arm big.LITTLE combination supported exactly the same ISA and were intentionally…

With some software work, you could pair differing cores. You'd just deliver a signal to a process saying 'youre about to be moved to a different core type, please recheck the capabilities'.

Then, you'd have a compatibility shim that emulates unimplemented instructions using traps for software that hadn't yet been rewritten to understand the above signal.

Re: Intel's New Chimera: Alder Lake

#36
post #7

Earlier quoted context omitted.

The goal of this kind of design is M1 like energy efficiency, not performance (I don't know if the Alder Lake P cores can outperform an M1 P core.) M1 has a similar architecture with performance and efficiency cores, but so far I haven't heard of it causing problems for software developers. All versions of macOS that support M1 also have a scheduler that is able to move threads between E and P cores nicely.

I thought the secret sauce to M1 was largely that it was a new architecture, without the decades of x86 backwards compatible baggage, with an OS and software capable of running natively on it?

Both, sort of. The secret sauce to M1 battery life is a combination of OS thread scheduling and efficiency cores. The secret sauce to M1 performance is having an architecture that doesn’t need to be thermal throttled as much as in other platforms.

It’s not that Apple invented chips that are remarkably faster than Intel’s or NVIDIA’s, it’s that Apple invented an integrated experience on this new architecture with split performance & efficiency cores and did so while maintaining backwards compatibility with macOS x86 apps in a way that’s indistinguishable from M1-native apps. (So they kept the “baggage” as it were, and it still performs fine.)

I expect Microsoft’s Surface line will catch up eventually, but the disconnect between Qualcomm/Intel as chip makers and Microsoft as OS vendor will slow down the transition for a good 4-6 years easy, and we’re 2 years into this transition to ultra-energy efficient architectures with less thermal throttling. (Full disclosure, I’ve a few Apple shares.)

Re: Intel's New Chimera: Alder Lake

#37

Personally I don't really see a point in having a hybrid architecture like this unless it'll lead to massively increased core counts, and so far it doesn't look like it does. AMD still beats Intel in both core counts and power efficiency, and they're only using P cores so... what's the point of having E cores? But maybe that's just because it's a first generation technology for Intel? I hope things improve in the fut…

The top Alder Lake desktop CPU has 16-cores, 8P+8E, compared to 8P in the 11-th gen. The E cores get around half the performance of the P cores, so the 8P+8E is get roughly the performance of a hypothetical 12P+0E CPU. The very high core parts are reserved for Xeon (a 56 core Alder Lake Xeon has been leaked, but I think the P/E split is still unknown).

What people need to realize is that a P cores takes around 4 times the die area/transistors of an E core, and use probably 3 to 4 times the power of an E core, but performance is only around double that of an E core. So with the same area, you get of the 8P+8E you can get 10P cores, not 12, and the question is if a 10P (rather than a 16P or even 12P) core Alder Lake is better than a 8P+8E. (Btw, these ratios are pretty similar as those for the Firestorm/Icestorm cores in Apple's M1.)

If your workload is very parallelizable you get more bang from your silicon and Watts with E cores than with P cores. If you have only embarrassingly paralleled workloads, you're probably better off with 32E cores than with a 8P cores.

Re: Intel's New Chimera: Alder Lake

#38
post #33

Just trying to figure this out. So the low power high power cores do seem to be inspired by the M1. If they can implement that easily in x86 is another thing but if anyone can Intel can I guess. The half prescion fps are obviously aimed at ML but how on earth are the hoping to compete with gpus on this front? Where is the use case on this (genuine question). The complex numbers bit makes me think of quantum circuit s…

big.LITTLE preceded the M1 by a long while.

Re: Intel's New Chimera: Alder Lake

#39

Personally I don't really see a point in having a hybrid architecture like this unless it'll lead to massively increased core counts, and so far it doesn't look like it does. AMD still beats Intel in both core counts and power efficiency, and they're only using P cores so... what's the point of having E cores? But maybe that's just because it's a first generation technology for Intel? I hope things improve in the fut…

AMD beats them because they are a process node ahead. Dunno why every comment implies there's some design gap that leads to M1 or AMD being more powerful or efficient. It's 90% the process node. There is no magic design sauce that makes those chips better. The big/little design change did seem to improve performance quite a bit for Intel, even using the same manufacturing node as before

I don’t completely agree. A MacBook Air M1 is 25% faster than a 10th generation Intel 10700K, running the same code full of floating point instructions and matrices. It’s not a simple matter of process node.

The same MacBook Air can do hour long Skype video calls with ~9% charge consumption, with no discernible heat difference on the body too.

M1 is a different beast.

Re: Intel's New Chimera: Alder Lake

#40

Personally I don't really see a point in having a hybrid architecture like this unless it'll lead to massively increased core counts, and so far it doesn't look like it does. AMD still beats Intel in both core counts and power efficiency, and they're only using P cores so... what's the point of having E cores? But maybe that's just because it's a first generation technology for Intel? I hope things improve in the fut…

AMD beats them because they are a process node ahead. Dunno why every comment implies there's some design gap that leads to M1 or AMD being more powerful or efficient. It's 90% the process node. There is no magic design sauce that makes those chips better. The big/little design change did seem to improve performance quite a bit for Intel, even using the same manufacturing node as before

They're not actually a process node ahead. Intel 10nm has slightly better density than TSMC 7nm.
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