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Single-chip processors have reached their limits

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Re: Single-chip processors have reached their limits

#81
post #66

I hope somebody with relevant knowledge can answer this question, please: what % of the costs is "physical cost per unit" and what % is maintaining the I+D, factories, channels...? In other words, if a chip with 100x size (100x gates, etc.) made sense, would it cost 100x to produce or just 10x or just 2x? Edit: providing there wouldn't be additional design costs, just stacking current tech.

>would it cost 100x to produce or just 10x or just 2x?

Why would 100x something only cost 2x to produce?

>what % of the costs is "physical cost per unit" and what % is maintaining the I+D, factories, channels...?

Without unit volume and a definition of the first "cost" in the sentence no one could answer that question. But if you want to know the BOM cost of a chip, it is simply Wafer Price divided total useable chips depending on yield where yield is both a factor of current maturity of node and whether your design allows correction of defects for usable chips. Then add about ~10% for testing and packaging.

Re: Single-chip processors have reached their limits

#83

I remember back in the 80's the limit was considered to be 64K RAM chips, because otherwise the defect rate would kill the yield. Of course, there's always the "make a 4 core chip. If one core doesn't work, sell it as a 3 core chip. And so on."

Hmm. I worked for a memory manufacturer in the 80s and I do not remember any limit.

That is mainstream news reporting for you since the 80s.

Re: Single-chip processors have reached their limits

#85
post #46

Earlier quoted context omitted.

If there's a defective M1 Ultra, they can cut it in half and say those are two low-end M1 Max.

Wouldn't they only get, at most, one low-end M1 Max if there is a defect?

If the defect is in the right place, Apple apparently sells M1 Max chips with some GPU cores disabled.

Re: Single-chip processors have reached their limits

#86
post #37

The M1 Ultra is fabricated as a single chip. The 12900K is fabricated as a single chip and is still a quarter the size of the M1 Ultra. Ryzen 3 puts 8 cores on a CCX instead of four because DDR memory controllers don't have infinite memory bandwidth (contrary to AMD's wishful nomenclature) and make shitty interconnects between banks of L3. Chiplets are valid strategies that are going to be used in the future but ther…

M1 ultra is two chips with an interconnect between them I thought? Or is the interconnect already on die with them? (Edit: sounds like it is two: "Apple said fusing the two M1 processors together required a custom-built package that uses a silicon interposer to make the connection between chips. " https://www.protocol.com/bulletins/apple-m1-ultra-chip )

> M1 ultra is two chips with an interconnect between them I thought? Or is the interconnect already on die with them?

It's either depending on how you look at it. The active components of the interconnect are on the two M1 dies, but the interconnect itself goes through the interposer as well.

Re: Single-chip processors have reached their limits

#87
post #55

I hope we are going to get back to a more asymmetric multi-processing arrangement in the near term where we abandon the fiction of a processor or two running the whole show with peripheral systems that have as little smarts as possible and promote them to at least second class citizens. These systems are much more powerful than when these abstractions were laid down, and at this point it feels like the difference bet…

The problem is AMP is very hard to program and debug. In embedded, one core is a scheduler and another is doing some real-time task (like arm BIG.little). In larger automotive heterogeneous compute platform, typically they are all treated as accelerators, or with bespoke Tier-1 integration (or like NVIDIA Xavier). And on top of that, OEMs always want to "reclaim" those spare cycles when the other AMP cores are underutilized, which is nigh impossible to do, so they fall back to symmetric MP. I think embedded is the only place for this to work right now.

EDIT: I'm not an expert in this field but I have been asked to do work in this domain, and this narrow sampling is what I encountered, but I'd like to learn more about tooling and strategies for more generic AMP deployments.

Re: Single-chip processors have reached their limits

#88
post #6

The best chiplet interconnect may turn out to be no interconnect at all. Wafer scale integration [1] has come up periodically over the years. In short, just make a physically larger integrated circuit, potentially as large as the entire wafer -- like a foot across. As I understand it, there's no particular technical hurdle, and indeed the progress with self-healing and self-testing designs with redundancy to improve…

Instead of microcircuits, megacircuits. I like it

Re: Single-chip processors have reached their limits

#89

Earlier quoted context omitted.

Sounds like a great development if it works out. But consider also that you can stick chiplets on top of each other vertically. That means you can put chiplets much closer together than if they were constrained to exist on the same single plane of the wafer. Now how about stacking wafers on top of wafers? That could be super, but there might be technical difficulties, which maybe sooner or later can be overcome.

> But consider also that you can stick chiplets on top of each other vertically. The problem there is heat dissipation. Already the performance constraint on consumer chips like the Apple M1 is how well it can dissipate heat in the product it's placed in (see Macbook Air vs Mac Mini). Stacking the chips just makes it worse.

The fact that the M1 Macbook Air operates without needing a fan is very unusual for that level of performance.

Re: Single-chip processors have reached their limits

#90

"Reached their limits" - I feel like I've heard this many many times before. Not that I doubt it, but just I've also been impressed with the ingenuity that folks come up with in this space.

For example, there's lots to explore in the VLIW space.

Compilers, largely.
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