Lanai, the mystery CPU architecture in LLVM
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Re: Lanai, the mystery CPU architecture in LLVM
#2> The world's best instruction mnemonic: PUNT, to switch between user and system contexts.
That's pretty good but I still prefer PowerPC's EIEIO.
https://www.ibm.com/docs/en/aix/7.2?topic=set-eieio-enforce-...
Re: Lanai, the mystery CPU architecture in LLVM
#3If Google acquired it, the cynical take is that they ended up sitting on it and doing nothing or killing it.
Re: Lanai, the mystery CPU architecture in LLVM
#4I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :)
EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...
Re: Lanai, the mystery CPU architecture in LLVM
#5I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :) EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...
Yeah, that blog post was a great reference to get a general overview of What Happened At Myricom.
... and I just hope I didn't write anything factually wrong in TFA. :)
Re: Lanai, the mystery CPU architecture in LLVM
#6If Google acquired it, the cynical take is that they ended up sitting on it and doing nothing or killing it.
The fact that they developed and upstreamed an LLVM backend indicates that they probably did something with it.
Re: Lanai, the mystery CPU architecture in LLVM
#7> The world's best instruction mnemonic: PUNT, to switch between user and system contexts. That's pretty good but I still prefer PowerPC's EIEIO. https://www.ibm.com/docs/en/aix/7.2?topic=set-eieio-enforce-...
There are many great Power mnemonics. VSX introduced one nearly as good, xxlxor (which, quite reasonably, is a logical XOR between VSX registers/FPRs). It's delightful to try to even pronounce.
The best part is that eieio's derivation is totally plausibly serious from its stated function. (Remember, IBM doesn't have a corporate sense of humour.) It's also an easy, fairly lightweight speculation barrier apart from its official usage.
Re: Lanai, the mystery CPU architecture in LLVM
#8If Google acquired it, the cynical take is that they ended up sitting on it and doing nothing or killing it.
The fact that they developed and upstreamed an LLVM backend indicates that they probably did something with it.
The Google way: Force the rest of the world adjust to your new "cool thing", and then kill it because it wasn't that great.
Re: Lanai, the mystery CPU architecture in LLVM
#9If Google acquired it, the cynical take is that they ended up sitting on it and doing nothing or killing it.
Mentor Graphics used to buy up silicon-compiler companies just to shut them down, so that manual layout tools would have a longer shelf life. They finally had to give that up around 1990, and figure out a different business to be in. Amazingly, they did.
Re: Lanai, the mystery CPU architecture in LLVM
#10I worked for Myricom 2001->2013, and Google 2013->2015. And, wow, I wish I could comment on this thread.. :) EDIT: Scott's Medium blog post linked from this article is fascinating: https://medium.com/swlh/myricom-an-hpc-story-and-lessons-lea...
I just want to know why it needs to be in-tree.