I hope they won't kill their CPLD line that has been obsoleted several times and then pushed back.
It's a lifesaver for designing digital circuits if you don't want to use a ton of 74 chips.
AMD Receives Approval for Acquisition of Xilinx
41–50 of 69 posts
Re: AMD Receives Approval for Acquisition of Xilinx
#42Earlier quoted context omitted.
The development side. Compiling and simulating your Verilog/VHDL can be done with open source software, but to put it on the FPGA itself, you generally need closed source (and sometimes paid) tools to generate the bitstreams. Contrast that with microcontrollers such as the ATMega which can be programmed from start to finish using an entirely FOSS stack - even the bootloader and programmer. And for some reason, these…
this is true in general but 1) vivado webpack edition (ie free) lets you write (and flash) a bitstream for some of the small chips. i know it at least works for the artix-7 family because i'm doing it every day lately 2) for the artix-7 (and some lattice chips) you supposedly can use OSS ( https://github.com/SymbiFlow/prjxray ). i haven't tried it yet but one problem i can foresee is that the OSS tools won't infer st…
> and some lattice chips
Lattice has been by far the favorite of the FOSS community, but there's been more news:
- https://github.com/YosysHQ/apicula has appeared for Gowin FPGAs found on e.g. Sipeed Tang Nano boards (very cheap on AliExpress) - a vendor called QuickLogic made SoCs that only use the FOSS toolchain for the FPGA part, out of the box: https://www.quicklogic.com/products/soc/eos-s3-microcontroll...
Re: AMD Receives Approval for Acquisition of Xilinx
#43Earlier quoted context omitted.
I would be a little surprised if they switched off of ARM. Even the Steam Deck with its custom AMD SoC is much closer to laptop specs and wattages than the switch e.g. 20w+ SoC, more than 2x battery capacity vs Switch. The switch has a lot more in common with phones than it does with other consoles or PC portables so IDK if we will see AMD SoCs with the right power profile for nintendo's needs. Nintendo could use one…
AMD has ARM licenses (IIRC, both architectural and for IP cores) and has shipped an Arm Cortex-A52 SoC in the past (Opteron A1100). If Nintendo really wanted, they might be able to order an Arm SoC from AMD directly. But yeah, going with Samsung would be far more practical. Problem is, many existing Switch games use some nvidia-specific API (IIRC called "NVN" or whatever) instead of Vulkan.
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Re: AMD Receives Approval for Acquisition of Xilinx
#44Why? Has Intel done anything with Altera? I’m curious. AMD’s acquisition of ATI is generally viewed as a strategic error. Does this make more sense?
Everything I've heard about the Altera deal is that Intel has basically just been milking existing customers, rather than attracting new ones. If AMD does more with Xilinx sooner than they did with ATI[1] it could be good strategic move. If they start making FPGAs standard on their CPUs (short term on the enterprise stuff, longer term on everything) in the same way FPUs are, this could provide them with a significant advantage both in CPUs and GPUs. The other half of the equation would be to open up the FPGAs enough to allow 3rd party tool chains so that they could be at least as open as CPU ISAs. If they keep the Xilinx (and most other FPGA manufacturers) business model of 100% proprietary devices and toolchains, I think people will look back on this acquisition years from now the same way they do ATI and ask 'why?'. Basically it seems rather smart if they want the tech to enhance their existing offerings but rather dumb (especially for the price paid) to keep the FPGA business as a silo.
[1] The rationale of getting into the GPU business made a lot of sense but here we are 15 years later and it's arguable AMD has largely squandered the opportunity. Even in APUs where they should be slaughtering Intel, AMD continues to hobble them by putting previous gen GPU cores in them. This was during a decade and a half when Intel's iGPUs were fairly weak and nVidia had nothing to counter with... smart move AMD!
Re: AMD Receives Approval for Acquisition of Xilinx
#45Earlier quoted context omitted.
I would be a little surprised if they switched off of ARM. Even the Steam Deck with its custom AMD SoC is much closer to laptop specs and wattages than the switch e.g. 20w+ SoC, more than 2x battery capacity vs Switch. The switch has a lot more in common with phones than it does with other consoles or PC portables so IDK if we will see AMD SoCs with the right power profile for nintendo's needs. Nintendo could use one…
I said that it would make more sense because they would open their platform to a lot more games, maybe it would cut a lot of dev work, and they'd might to it with competitive prices (like the Steam Deck has shown). Now, Nintendo doesn't care much about that because they're into their own thing, they don't even see themselves as a tech or gaming company, the position themselves as an entertainment company. Like, I thi…
Half or so of all Switch games are already made with Unity and I don't think Switch not being x86 is the reason most other games are not ported to Switch.
Re: AMD Receives Approval for Acquisition of Xilinx
#46Why? Has Intel done anything with Altera? I’m curious. AMD’s acquisition of ATI is generally viewed as a strategic error. Does this make more sense?
Everything I've heard about the Altera deal is that Intel has basically just been milking existing customers, rather than attracting new ones. If AMD does more with Xilinx sooner than they did with ATI[1] it could be good strategic move. If they start making FPGAs standard on their CPUs (short term on the enterprise stuff, longer term on everything) in the same way FPUs are, this could provide them with a significant…
I don’t think the ATI acquisition was an error, integration has been harder than expected. The game concsoles would have been difficult wo having a world class GPU available.
The work they did around HSAIL and APUs shows that they have the creativity and the will.
Re: AMD Receives Approval for Acquisition of Xilinx
#47This is bad.
Re: AMD Receives Approval for Acquisition of Xilinx
#48I hope they won't kill their CPLD line that has been obsoleted several times and then pushed back. It's a lifesaver for designing digital circuits if you don't want to use a ton of 74 chips.
It was my understanding Lattice's FPGAs / CPLDs are more tailored for the smaller (possibly hobbyist scale) EEs out there.
Bonus points: Lattice has turned a blind eye at the open source community, meaning Lattice's FPGAs / CPLDs have open-source toolsets. Kinda sad that "blind eye" is the best we can hope for from these companies, but that's how it is for now...
Re: AMD Receives Approval for Acquisition of Xilinx
#49Earlier quoted context omitted.
You've struck on the fundamental problem that the FPGA industry has been trying to solve for 30+ years - how to get an FPGA into the hands of every developer, like how GPUs have propagated to be essential tools. Nobody has come up with a good answer yet. Developing for an FPGA still requires domain-specific knowledge, and because place & route (the "compile" for an FPGA) is a couple of intertwined NP-hard problems de…
You don't seem bullish on the prospects of using Vitis [0] to deploy a machine learning model to a Xilinx FPGA? [0] https://www.xilinx.com/products/design-tools/vitis/vitis-pla...
Disclaimer: I work in this space (not at Xilinx), comments are strictly my own opinions and do not reflect any positions of my employer, etc.
Broadly speaking, FPGA-based ML model accelerators are in an interesting space right now, where they aren't particularly compelling from a performance (or perf / Watt, perf / $, etc.) perspective. If you just need performance, then a GPU or ASIC-based accelerator will serve you better - the GPU will be easier to program, and ASIC-based accelerators from the various startups are performing pretty well. Where an FPGA accelerator makes a lot of sense is if you otherwise need an FPGA anyways, or the other benefits of FPGAs (e.g. lots of easily-controlled IO) - but then you're just back to square 1 of "there's some cases where an FPGA makes sense and many where it doesn't". Besides that, a few niche cases where a mid-range FPGA might beat a mid-range GPU on perf / Watt or whatever metric is important for you.
Again, opinions are my own and all that. As someone in the space, I am very much hoping that someone - whether an ASIC startup or Xilinx / Intel come up with a "better" (performant, cheaper, easier to use, etc.) solution than GPUs for ML applications. If the winner ends up being FPGAs, that would be really really cool! Just at the moment it's not too compelling, and I'm trying to be realistic.
All that said, FPGAs and their related supports (software, boards, etc.) are an $Xb / Y market - nothing to shake a stick at, and there are many cases where an FPGA makes sense. Just doesn't currently make sense for every dev to buy an FPGA card to drop in their desktop to play with.
Re: AMD Receives Approval for Acquisition of Xilinx
#50Earlier quoted context omitted.
this is true in general but 1) vivado webpack edition (ie free) lets you write (and flash) a bitstream for some of the small chips. i know it at least works for the artix-7 family because i'm doing it every day lately 2) for the artix-7 (and some lattice chips) you supposedly can use OSS ( https://github.com/SymbiFlow/prjxray ). i haven't tried it yet but one problem i can foresee is that the OSS tools won't infer st…
> and some lattice chips Lattice has been by far the favorite of the FOSS community, but there's been more news: - https://github.com/YosysHQ/apicula has appeared for Gowin FPGAs found on e.g. Sipeed Tang Nano boards (very cheap on AliExpress) - a vendor called QuickLogic made SoCs that only use the FOSS toolchain for the FPGA part, out of the box: https://www.quicklogic.com/products/soc/eos-s3-microcontroll...
>Lattice has been by far the favorite of the FOSS community
i'm interested in the OSS flows but i haven't dug in yet. so some questions (if you have experience): isn't it only for their ice40 chips? and how smooth is the flow from RTL to bitstream to deploy?
one hesitation i have with jumping in is that i'm working on accelerator type stuff, so my designs typically need on the other of 30k-50k LUTs. will yosys+nextpnr let me deploy such a design to some chip?