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Intel completely disables AVX-512 on Alder Lake after all

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Re: Intel completely disables AVX-512 on Alder Lake after all

#231

Post by tehjoker »

ashtonkem wrote: post #123
codeflo wrote: post #11

If all of this was planned (and I’m not saying it is), that would have been very clever. It would work like this: 1. You “accidentally forget” to disable the feature in hardware. Given how competitive the market is, motherboard manufacturers can be relied upon to enable it in their “1337 OVERCLOCKZ” mode. No conspiracy is needed. 2. You “tolerate” this practice just long enough to win the critical initial wave of rev…

> Very few “evil schemes” exist in reality because people aren’t all that clever (and all that evil). Also, groups of people are really bad at keeping secrets. In my experience most orgs that do bad things find a way to make everyone think that it’s either actually a good thing, or that someone else is responsible for it. If you make people think there’s a dark secret, they’ll tell eventually.

This makes no sense. There are plenty of secrets and schemes out there. Often it's only necessary to keep a secret in the present. If it comes out years later, often people just ignore it.

Re: Intel completely disables AVX-512 on Alder Lake after all

#232

Post by pantalaimon »

xondono wrote: post #153
mhh__ wrote: post #125

Earlier quoted context omitted.

Pretty crap reasoning then. Intel never ever marketed these as having AVX-512 and unless you are running a Xeon from 2012 like the paper you've linked a modern CPU (note, any desktop class CPU) will only be vulnerable to some bits of Spectre and not meltdow

My 7700K (2017) got a similar downgrade in performance from the mitigations. Switched to AMD for the first time in my life, no regrets so far.

    mitigations=off
is IMHO a save thing to do on a single user desktop unless you have nation state level adversaries

Re: Intel completely disables AVX-512 on Alder Lake after all

#233

Post by hajile »

amluto wrote: post #217
tmccrary55 wrote: post #149

Earlier quoted context omitted.

Boost your benchmarks with AVX-512 by subscribing to Intel+

What benchmarks? Not a lot of real programs actually use AVX512, and a lot of the ones that did discovered that it made performance worse , so they stopped. (The issue is that AVX512 (the actual 512-bit parts, not the associated EVEX and masking extensions) may well be excellent for long-running vector-math-heavy usage, but the cost of switching AVX512 on and off is extreme, and using it for things like memcpy() and…

> What benchmarks? Not a lot of real programs actually use AVX512, and a lot of the ones that did discovered that it made performance worse, so they stopped.

This paints a picture of what happened to Intel's fab process rather than AVX-512 itself.

AVX-512 was proposed back in 2013. It was NOT designed for desktops. The original designs were for their Phi chips (basically turning a bunch of x86 cores into a GPU). These Phi chips ran between 1 and 1.5GHz, so power consumption and clocks were always matched up.

Intel wanted to move these instructions into their HPC CPUs. The problem at hand was ultra-high turbo speeds. These speeds work because the heat is a bit spread out on the chip and a lot of pieces are disabled at any given time. With AVX-512, they had 30% of the core going wide open for the vector units (not to mention the added usage from saturating the load/store bandwidth).

They wanted 10nm and then 7nm to fix these issues. At their predicted schedule, 10nm would have launched in 2015 and 7nm in 2017.

Given the introduction of AVX-512 in 2013, they had plenty of time. In fact, the first official product was Knight's landing in 2016. Skylake with AVX-512 didn't launch until 2017 when they were supposed to be on 7nm.

Intel was forced to backport their designs to 14nm++++++++++++ which forced a deal with the devil. They had to downclock the CPU to keep within thermal limits, but this slowed down EVERYTHING. Maybe they could have created a separate power plane for AVX, but this would be a BIG change (and probably politically infeasible).

What happens with the downclocking? If you run dedicated AVX-512 loads, then maybe you should have been looking at Phi instead. If not, mixed loads suffered overall because of the lower clockspeeds.

Their second revision of 10nm superfin is still a generation larger (well, probably a half-generation) than what they anticipated. There might still be downclocking, but I'd guess that it's nowhere near what previous iterations required.

TL;DR -- AVX-512 was launched two nodes too early which screwed over performance. It should become acceptable either with 10nm Superfin or 7nm when it launches so the CPU doesn't have to downclock constantly.

Re: Intel completely disables AVX-512 on Alder Lake after all

#234

Post by pantalaimon »

PragmaticPulp wrote: post #76
sesuximo wrote: post #14

Really missed an opportunity to give something to people for free

No, the AVX-512 instructions weren’t free. You had to disable all of the E cores. It only made sense if you could afford to give up the extra cores to accelerate a few instructions in a smaller number of threads. It wasn’t a net win for the average person. I doubt many people would ever do this.

So why not leave that option for people who want to write and test AVX512 code?

It's almost like Intel doesn't want people to use that feature

Re: Intel completely disables AVX-512 on Alder Lake after all

#236

Post by oofabz »

PragmaticPulp wrote: post #76
sesuximo wrote: post #14

Really missed an opportunity to give something to people for free

No, the AVX-512 instructions weren’t free. You had to disable all of the E cores. It only made sense if you could afford to give up the extra cores to accelerate a few instructions in a smaller number of threads. It wasn’t a net win for the average person. I doubt many people would ever do this.

E cores are only present on the high-end Alder Lake SKUs. If you have a mid-range chip with only P cores like the i5-12400, enabling AVX-512 really is free.

Such P-core-only chips are attractive to Linux users. Intel Thread Director, their Alder Lake schedule software, does not work as well on Linux as it does on Windows. It has a tendency to schedule processes on the E cores even when P cores are available, which is bad for performance.

There is significant overlap between users interested in AVX-512 and users interested in Linux performance, making the mid-range Alder Lake chips especially appealing to this group. Unfortunately they top out at 6 cores with no ECC, so it's not a perfect match.

Re: Intel completely disables AVX-512 on Alder Lake after all

#237

Post by fomine3 »

flyinghamster wrote: post #61
SkeuomorphicBee wrote: post #10

Stuff like this is why I plan to never buy Intel ever again. I always disliked Intel's strategy for market segmentation by disabling specific instructions, I much prefer AMD's strategy of segmenting just by speed and number of cores. It is really annoying that with Intel you can't run the same program on the server and on your desktop, it makes development and testing a huge pain.

The Core 2 Quad Q8200 was what did it for me. I had intended to build a system to play with virtual machines, only to find after I built it up that the Q8200 didn't have VT-x - something that was NOT noted in the store display. I put it in an Intel-branded motherboard as well, and that turned out to be one of the few motherboards I've had that failed prematurely. Since then, the only Intels I've bought since then hav…

Unlocked K CPUs didn't support VT-d until Skylake. That was weird segmentation.

Re: Intel completely disables AVX-512 on Alder Lake after all

#238

Post by bravo22 »

zinekeller wrote: post #72
bravo22 wrote: post #56

Earlier quoted context omitted.

"cuts" are almost always fuses that are blown by ATEs during wafer manufacturing or post packaging tests. It is a bit flip. There is no extra cost.

And if it wasn't designed to be "blowed up" in the first place, in the hopes that the E-cores do have AVX-512? In that case, it's a literal cut and not simply blowing the fuse.

If it wasn't desigend to be disabled it would be buried under multiple and multiple metal layers. You can't "cut" it like a wire. Metal layers run all over the place [1].

Therefore it would have a an e-fuse or a regular old 'current' fuse -- which is just passing a calculated amount of current through an intentionally thin interconnect so that it burns away.

1 - https://static.techspot.com/articles-info/1840/images/2019-0...

Re: Intel completely disables AVX-512 on Alder Lake after all

#239

Post by qayxc »

fivea wrote: post #100
qayxc wrote: post #39

Earlier quoted context omitted.

One word: support. Once you advertise a feature, you have to support it. It'd be pretty damn hard for Intel to explain why lower tier i5 and i3 CPUs have a feature that higher tier i7 and i9 SKUs are missing unless you jump through hoops via hardware (e.g. disable E-cores) or software (e.g. making sure to only run your process on P-cores). If you want to experiment with AVX-512, just get an older CPU. Much less hassl…

> One word: support. That hypothesis is not credible. They can simply declare a feature is unsupported, and even that using it voids some guarantee. I mean, look at how overclocking is handled.

You can still use the feature at your own risk - no one is forcing you to install the microcode update.

Re: Intel completely disables AVX-512 on Alder Lake after all

#240

Post by jeffbee »

dragontamer wrote: post #222
CodesInChaos wrote: post #141

Earlier quoted context omitted.

AFAIK it downclocks the CPU, even if the AVX512 instructions are only a tiny fraction of instructions. So you only benefit from AVX512 if you use it enough. While 128 bit SIMD give you a speedup if you use it for a few functions that need it, without slowing down the rest of your code or even unrelated applications.

There's significant downclocking only on on Skylake-X (aka: 1st generation teething problems). On more recent cores, there's only ~100 MHz of downclocking, which is so small you can pretty much ignore it.

It's amazing how sticky the myth has become, though. On Ice Lake Xeon there is basically no penalty for using the AVX-512 unit.
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