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Intel completely disables AVX-512 on Alder Lake after all

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Re: Intel completely disables AVX-512 on Alder Lake after all

#111
post #42

Earlier quoted context omitted.

Yeah, AMD Ryzen Framework laptop would be amazing. (Would also have ECC support?) They'd have to license TB from Intel. I don't know about TB4, but TB3 is royalty-free, just gotta pass a certification. TB3 or better would be great for eGPUs in general. Not sure I personally would need TB4. Also, I wonder if Framework would be usable with say Proxmox and macOS (or 'native' Hackintosh?)

> AMD Ryzen Framework laptop would be amazing Except you cannot disable AMD PSP.

Lets compare it to all the other options, shall we? Perfect is the enemy of good, and your uncompromising way of doing things (including not loading microcode 'because it is closed source') is, to put it simple: harmful. And unusual, as well (its not a dealbreaker for many people). The laptop is modular and repairable, just like a Fairphone is modular and repairable. Its a great step forward and, while not perfect and possibly a reason to not buy it, a minor detail for most people. If we should follow FSF's principles we would not be able to load microcode to fix Spectre 'because it is proprietary' like Trisquel apparently does. Meanwhile, Librem 5 delivers awful performance, and Pinephone offer 30 days warranty. Both have killswitches though: great feature. Again, perfect is the enemy of good. Because if killswitches are a requirement for you, then these are about your two options. If a modular laptop is a requirement for you, you are bound to what? Old Thinkpads?

Re: Intel completely disables AVX-512 on Alder Lake after all

#112
post #11

If all of this was planned (and I’m not saying it is), that would have been very clever. It would work like this: 1. You “accidentally forget” to disable the feature in hardware. Given how competitive the market is, motherboard manufacturers can be relied upon to enable it in their “1337 OVERCLOCKZ” mode. No conspiracy is needed. 2. You “tolerate” this practice just long enough to win the critical initial wave of rev…

I've voiced this before but I think AVX-512 is completely irrelevant in the consumer space (which imho makes titles like "Intel artificially slows 12th gen down" incredulous). Even for commercial applications - sure there are some things that benefit from it. On the other hand, I work in HPC and even in (commercial, not nuke simulations or whatever the nuke powers do with their supercomputers) HPC applications AVX-51…

Everything is rarely used until the instructions are ubiquitous.

Re: Intel completely disables AVX-512 on Alder Lake after all

#113

Stuff like this is why I plan to never buy Intel ever again. I always disliked Intel's strategy for market segmentation by disabling specific instructions, I much prefer AMD's strategy of segmenting just by speed and number of cores. It is really annoying that with Intel you can't run the same program on the server and on your desktop, it makes development and testing a huge pain.

The Core 2 Quad Q8200 was what did it for me. I had intended to build a system to play with virtual machines, only to find after I built it up that the Q8200 didn't have VT-x - something that was NOT noted in the store display. I put it in an Intel-branded motherboard as well, and that turned out to be one of the few motherboards I've had that failed prematurely. Since then, the only Intels I've bought since then hav…

to be fair, that's unavoidable with AVX-512, you can't underestimate how much power it draws compared to non-vectorised instructions. That's why Prime95 is such an effective stress test and draws 150% of the power that Cinebench R20 does for example.

Re: Intel completely disables AVX-512 on Alder Lake after all

#114
post #34

Earlier quoted context omitted.

You can only upgrade microcode on any given boot, not downgrade it. Therefore, if the BIOS has already upgraded your microcode for you on boot, you can't undo that from the OS.

The BIOS doesn't upgrade microcode - the OS does. During boot there's usually no network connectivity, so how would the BIOS even know of an update, let alone acquire it?

The BIOS itself comes with microcode. You upgrade your BIOS for whatever reason and it comes with new microcode applied on boot, which you can't disable. Sure, if you don't upgrade your BIOS you can keep using the old microcode. But you might have to to fix bugs or improve performance.

Re: Intel completely disables AVX-512 on Alder Lake after all

#115
post #82

Earlier quoted context omitted.

Quoted post unavailable.

>by seeing a feature The other person just said that the feature wasn't advertised. Most people would not be aware it was even possible.

Many features of products aren't advertised explicitly. You don't expect those to be disabled, however, if part of the reason you purchased it was because you found out it was there.

I can see Intel's rationale if it were never promised, but the timing of the removal of the feature is suspect. If Intel is doing this because it sees some level of future chip sales being negatively impacted by a feature that is in the chip that they previously gave customers access to, then they should be held accountable in my opinion. If nothing else people burned by this can chalk another one up to Intel's misguided sales team. It's as if Intel is asking for this sort of attention lately.

Re: Intel completely disables AVX-512 on Alder Lake after all

#116

Stuff like this is why I plan to never buy Intel ever again. I always disliked Intel's strategy for market segmentation by disabling specific instructions, I much prefer AMD's strategy of segmenting just by speed and number of cores. It is really annoying that with Intel you can't run the same program on the server and on your desktop, it makes development and testing a huge pain.

Don't forget it's not just instruction sets; Intel is the reason we don't have ECC RAM on desktops. Every other high density storage technology has used error correction for a decade or two, but we're still sitting here pretending we can have 512 billion bits of perfect memory sitting around that will never go wrong, because Intel fuse it off on desktop chips. I guess only servers need to be reliable. AMD supports EC…

> Don't forget it's not just instruction sets; Intel is the reason we don't have ECC RAM on desktops.

Of course we do: workstations.

It's cheaper, that's why it isn't everywhere.

Re: Intel completely disables AVX-512 on Alder Lake after all

#117

Earlier quoted context omitted.

Don't forget it's not just instruction sets; Intel is the reason we don't have ECC RAM on desktops. Every other high density storage technology has used error correction for a decade or two, but we're still sitting here pretending we can have 512 billion bits of perfect memory sitting around that will never go wrong, because Intel fuse it off on desktop chips. I guess only servers need to be reliable. AMD supports EC…

> Don't forget it's not just instruction sets; Intel is the reason we don't have ECC RAM on desktops. Of course we do: workstations. It's cheaper, that's why it isn't everywhere.

Intel's lower end workstation chips are the same silicon, and thus the same manufacturing cost, as their desktop chips. They just artificially disable features like ECC for product segmentation. It is unconscionable that something as essential as ECC is crippled out of the consumer line-up.

Re: Intel completely disables AVX-512 on Alder Lake after all

#118
post #11

If all of this was planned (and I’m not saying it is), that would have been very clever. It would work like this: 1. You “accidentally forget” to disable the feature in hardware. Given how competitive the market is, motherboard manufacturers can be relied upon to enable it in their “1337 OVERCLOCKZ” mode. No conspiracy is needed. 2. You “tolerate” this practice just long enough to win the critical initial wave of rev…

> 2. You “tolerate” this practice just long enough to win the critical initial wave of reviews and benchmarks. Interested buyers will look at those charts for years to come. That’s not what happened here. The AVX-512 instructions not only weren’t enabled by default, they couldn’t be enabled at all unless you went out of your way to disable the efficiency cores completely. They also wouldn’t benefit your workload unle…

> The AVX-512 instructions not only weren’t enabled by default, they couldn’t be enabled at all unless you went out of your way to disable the efficiency cores completely. They also wouldn’t benefit your workload unless disabling those extra cores was offset by the AVX-512 instructions on the remaining cores.

If your code benefits from AVX-512, it'll probably benefit from turning off the efficiency cores too. Sixteen 256-bit AVX channels are the same as eight 512-bit channels in theoretical throughput. Because there are fewer load/store commands and fewer bunches of setup code to run, overall theoretical efficiency should be higher.

Power efficiency was a killer at 14nm. The cores would downclock into oblivion when AVX-512 executed. Given the node shrink and shutting off half the cores, I don't see why this would happen here. Doing the same calculations with less power means a lot for the kinds of workloads that actually use AVX-512. Sure, idle performance may go down a bit, but once again, if you're running the kind of application that benefits from this, that's also probably not a top consideration either.

The real solution would be for Intel to detect the presence of AVX-512 instructions then automatically and unconditionally pin the thread to the big cores. It wouldn't be hard either, just catch the unknown instruction exception and see if it is AVX-512 then move the thread.

Re: Intel completely disables AVX-512 on Alder Lake after all

#119

Earlier quoted context omitted.

There was no specification about this feature until immediately prior to launch. When a company announces with years in advance a new product (e.g. Alder Lake), that is the replacement for their previous product (i.e. Rocket Lake & Tiger Lake) and in that series of products the most valuable feature is backward software compatibility and the new product will no longer have this feature, one would expect that the comp…

Sure, but that's a customer expectation vs legal obligation. Like, my sister bought the new M1 MacBook Air, only to discover that it doesn't support dual external screens - while her previous Air did. So there was absolutely an expectation there that any new MacBook Air would also support dual screens, right? But, at the end of the day - it is mentioned in the spec sheet. She could have checked. Just assuming that a…

The difference is dual screens don't work on the M1 MBA because it physically only has two display controllers in the silicon, one of them wired to the internal panel, and the other muxed to the two TB ports. The M1 Pro has two external display controllers, and the M1 Max four. I can show you where they are on the die shots, and that it's not artificial crippling.

But what Intel is doing here is disabling existing silicon that exists and works.

Re: Intel completely disables AVX-512 on Alder Lake after all

#120
post #2

Is this not the definition of bait and switch? How can this not end up in a lawsuit and investigation from regulatory bodies ?

It was never advertised, and Intel very specifically said AVX-512 instructions will not be available. Some motherboard manufacturers made them available anyway, now Intel is fixing that. It's like buying a car with an advertised speed limiter of 155mph, then finding that actually it can go 170mph, and then the manufacturer fixes the speed limiter with a software update. Yes we know the car could go faster, but the sp…

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