Live data from Hacker News

Apple’s new M1 Pro and M1 Max processors

apple.com

471–480 of 1001 posts

Re: Apple’s new M1 Pro and M1 Max processors

#471

Earlier quoted context omitted.

The Apple cores are full custom, Apple-only designs. The AWS Graviton are Neoverse cores, which are pretty good, but clearly these Apple-only M1 cores are above-and-beyond. --------- That being said: these M1 cores (and Neoverse cores) are missing SMT / Hyperthreading, and a few other features I'd expect in a server product. Servers are fine with the bandwidth/latency tradeoff: more (better) bandwidth but at worse (h…

My understanding is that you don't really need hyperthreading on a RISC CPU because decoding instructions is easier and doesn't have to be parallelised as with hyperthreading.

Okay, the whole RISC thing is stupid. But ignoring that aspect of the discussion... POWER9, one of those RISC CPUs, has 8-way SMT. Neoverse E1 also has SMT-2 (aka: 2-way hyperthreading).

SMT / Hyperthreading has nothing to do with RISC / CISC or whatever. Its just a feature some people like or don't like.

RISC CPUs (Neoverse E1 / POWER9) can perfectly do SMT if the designers wanted.

Re: Apple’s new M1 Pro and M1 Max processors

#472

I always thought it was strange that "integrated graphics" was, for years, was synonymous with "cheap, underperforming" compared to the power of a discrete GPU. I never could see any fundamental reason why "integrated" should mean "underpowered." Apple is turning things around, and is touting the benefits of high-performance integrated graphics.

The software side hasn't been there on x86 GP platforms, even though AMD tried. It's worked out better on consoles.

What software is missing? I figured the AMD G-series CPUs used the same graphics drivers and same codepaths in those drivers for the same (Vega) architecture.

My impression was that it was still the hardware holding things back: Everything but the latest desktop CPUs still using the older Vega architecture. And even those latest desktop CPUs are essentially PS5 chips that got binned out.

Re: Apple’s new M1 Pro and M1 Max processors

#473
post #450

It's a bit concerning that the new chips have special purpose video codec hardware. I hope this trend doesn't continue, requiring laptops from different manufacturers to play different video formats or at least with a non-degraded quality.

Video encode and decode have been GPU and integrated GFX features for quite a long time now.

Re: Apple’s new M1 Pro and M1 Max processors

#475
post #105

"Apple’s Commitment to the Environment" > Today, Apple is carbon neutral for global corporate operations, and by 2030, plans to have net-zero climate impact across the entire business, which includes manufacturing supply chains and all product life cycles. This also means that every chip Apple creates, from design to manufacturing, will be 100 percent carbon neutral. But what they won't do is put the chip in an expan…

They would make less money if they made the chip repairable. This doesn't have to make them evil. Apple being more profitable also means they can lower the cost and push the technological advancement envelop forward faster. Every year we will get that much faster chips. This is good for everyone.

This doesn't mean Apple's carbon footprint has to suffer. If Apple does a better job recycling old Macbooks than your average repair guy who takes an old CPU and puts in a new one in a repairable laptop then Apple's carbon footprint could be reduced. I remember the days when I would replace every component in my desktop once a year, I barely thought about recycling the old chips or even selling them to someone else. They were simply too low value to an average person to bother with recycling them properly or reselling them.

Re: Apple’s new M1 Pro and M1 Max processors

#476
post #350

Earlier quoted context omitted.

Not sure if it will be available, but 400GB/s is way too much for 8 cores to take up. You would need some sort of avx512 to hog up that much bandwidth. Moreover, it's not clear how much of a bandwidth/width does M1 max CPU interconnect/bus provide. -------- Edit: Add common sense about HPC workloads. There is a fundamental idea called memory-access-to-computation ratio. We can't assume a 1:0 ratio since it was doing…

Don't know the clock speed but 8 cores at 3Ghz working on 128bit SIMD is 8 3 16 = 384GB/s so we are in the right ball park. Not that I personally have a use for that =) Oh, wait, bloody Java GC might be a use for that. (LOL, FML or both).

[deleted]

Re: Apple’s new M1 Pro and M1 Max processors

#477
post #89

Earlier quoted context omitted.

You can most definitely use the latest Parallels IIRC, why dual boot?

Mostly for gaming. I use bootcamp now to play MTG Arena and StarCraft 2 on windows which seems to have much better perf. I imagine gaming doesnt work well in parallels?

You can play SC2 via rosetta. Unfortunately not optimised for M1

Re: Apple’s new M1 Pro and M1 Max processors

#478
Has anyone tried extremely graphically intense gaming on these yet, I actually would love to consolidate all of my computer usage to a single machine, but it would need to handle everything I need it to do. $2000 for a laptop that can replace my desktop, is not a bad deal. Although that said I’m in no rush here.

Re: Apple’s new M1 Pro and M1 Max processors

#479
post #350

Earlier quoted context omitted.

Really curious if the memory bandwidth is entirely available to the CPU if the GPU is idle. An nvidia RTX3090 has nearly 1TB/s bandwidth, so the GPU is clearly going to use as much of the 400GB/s as possible. Other unified architectures have multiple channels or synchronization to memory, such that no one part of the system can access the full bandwidth. But if the CPU can access all 400GB/s, that is an absolute game…

Not sure if it will be available, but 400GB/s is way too much for 8 cores to take up. You would need some sort of avx512 to hog up that much bandwidth. Moreover, it's not clear how much of a bandwidth/width does M1 max CPU interconnect/bus provide. -------- Edit: Add common sense about HPC workloads. There is a fundamental idea called memory-access-to-computation ratio. We can't assume a 1:0 ratio since it was doing…

> Not sure if it will be available, but 400GB/s is way too much for 8 cores to take up. You would need some sort of avx512 to hog up that much bandwidth.

If we assume that frequency is 3.2Ghz and IPC of 3 with well optimized code(which is conservative for performance cores since they are extremely wide) and count only performance cores we get 5 bytes for instruction. M1 supports 128-bit Arm Neon, so peak bandwidth usage per instruction(if I didn't miss anything) is 32 bytes.

Post reply on HN