Project IceStorm: open-source toolchain for Lattice iCE40 FPGAs • Hacker News Board

Re: Project IceStorm: open-source toolchain for Lattice iCE40 FPGAs

#11

Post by rvalles » Tue, Sep 28, 2021, 12:47 PM UTC

I learned the FPGA ropes by making (from scratch, reinventing many wheels) a fast interface between dbus (TI calculator link port) and a standard serial port in Verilog. It is dramatically faster than every other "link cable" available.[1]

Thanks to IceStorm/yosys/nextpnr, I never had to touch a proprietary tool to do this.

There's now very cheap, OSHW development boards to get started with[2].

[1] https://github.com/rvalles/dbus_ti_link_uart_verilog

[2] https://joelw.id.au/FPGA/CheapFPGADevelopmentBoards

Re: Project IceStorm: open-source toolchain for Lattice iCE40 FPGAs

#12

Post by marcodiego » Tue, Sep 28, 2021, 1:19 PM UTC

Around 15 years ago, the micro controller world was as proprietary as the FPGA is today. Arduino won. We're fighting the same battle this time and I hope we'll win again.

Re: Project IceStorm: open-source toolchain for Lattice iCE40 FPGAs

#13

Post by intricatedetail » Tue, Sep 28, 2021, 1:50 PM UTC

I played around with Risc-V on this platform. Super easy and fun.

Re: Project IceStorm: open-source toolchain for Lattice iCE40 FPGAs

#14

Post by mkarr » Tue, Sep 28, 2021, 2:08 PM UTC

paulannesley wrote: post #5

I'm on my first foray into FPGA development, using IceStorm as the toolchain for a Lattice iCE40 FPGA (iCE40HX4K) to implement a system controller for my homebrew 6502 single board computer. The FPGA is (work in progress) doing clock management, address decoding, memory bank switching, SPI comms, some GPIO, and bootstrap to RAM from SPI flash memory. It's fantastic having an open-source toolchain! It's why I chose th…

Is your 6502 SBC in any state to share more info on? It seems like an interesting project.

Re: Project IceStorm: open-source toolchain for Lattice iCE40 FPGAs

#15

Post by prbs23 » Tue, Sep 28, 2021, 11:59 PM UTC

I've been following the IceStorm project for a while and it's some really impressive work. Now if only we could get a decent open source SystemVerilog simulator to go along with it. As someone who works in the ASIC design world, the thing that makes my side projects die out is usually the state of the open source simulation tools. I have tried to use both Verilator and Icarus, and both have so many limitations and quirks beyond what I'm used to with the commercial tools gave up on them.

I keep telling myself I need to dig into their source code and start fixing problems, but going from user to developer on these kinds of tools is a big jump.