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Interview with Jim Anderson, CEO of Lattice Semiconductor

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Re: Interview with Jim Anderson, CEO of Lattice Semiconductor

#31

Post by kimmeld »

fleventynine wrote: post #30
kimmeld wrote: post #29

Earlier quoted context omitted.

The entire EDA stack from front to back is so ridiculously bad. System Verilog, UVM and the ecosystem that works on it are equally terrible. Just depressing all around.

Once we have a high quality "LLVM of digital logic", we have a great foundation for better high-level tools. It's just a matter of funding and motivation. In my dreams some Chinese FPGA upstart decides to invest huge in the open tools rather than negotiate with the current toolchain vendors...

Have you read the verilog spec? Half the commercial vendors haven’t implemented large portions of the spec or have implemented it differently from each other.

I’d love to have the momentum around open source EDA tools. At this point I’m not hopeful though.

Re: Interview with Jim Anderson, CEO of Lattice Semiconductor

#32

Post by grandmczeb »

fleventynine wrote: post #28
brianfaith wrote: post #23

Earlier quoted context omitted.

MisterTea, QuickLogic has open source tools for FPGA products here: https://www.quicklogic.com/software/qorc-mcu-efpga-fpga-open... Linux is supported.

Unfortunately, 10G serdes and >50kLUTs are table stakes to run the applications I have in mind...I think we're a long way from officially supported open toolchains for medium-size FPGAs.

Just curious, what kind of applications are you thinking of?

Re: Interview with Jim Anderson, CEO of Lattice Semiconductor

#33

Post by ur-whale »

DoingIsLearning wrote: post #2

> ... we built out a pretty significant portfolio of these applications solutions and they make it very easy for the customer to adopt our devices into their systems... Very disappointing that on the topic of Software/Toolchain it's more of the same business decisions of just copying the Xilinx/Altera paradigm. Since they seemed rather non-agressive towards Yosys/SymbiFlow they made me quite hopeful that Lattice woul…

> I know I cannot be alone in this.

You aren't alone. Most people who work with FPGAs hate the toolchains.

The entire FPGA industry and to a larger extent the entire semi industry in plagued by this problem.

This is a deep cultural issue.

Look for example at NVidia and their dumb secrecy policy around drivers (just the first example on top of my head, examples abound).

Secrecy and making your customers pay for tools is dyed in the DNA of these people and it is going to take a very long time for them to understand the economic advantage of openness.

It took MSFT almost 30 years to finally understand the lesson that giving away dev tools for free (e.g. Visual Studio) was a competitive boost.

Re: Interview with Jim Anderson, CEO of Lattice Semiconductor

#34

Post by jlokier »

DoingIsLearning wrote: post #2

> ... we built out a pretty significant portfolio of these applications solutions and they make it very easy for the customer to adopt our devices into their systems... Very disappointing that on the topic of Software/Toolchain it's more of the same business decisions of just copying the Xilinx/Altera paradigm. Since they seemed rather non-agressive towards Yosys/SymbiFlow they made me quite hopeful that Lattice woul…

It's been like this for over 20 years. I was trying to persuade people on comp.arch.fpga 20 years ago that we should band together and produce some open tools for Xilinx, and I was eager to do it myself.

People warned me that Xilinx were legally very aggressive and that I could lose everything I owned. Nobody wanted to get involved then. At one point an academic paper about alternative programming techniques on Xilinx devices withdrew some of their work, out of legal concerns. So I kept out of it too.

In fact, I quit working with FPGAs for a long time (it had been my main job, developing and using hardware compilers at a higher level than VHDL/Verilog), so that my previous use of Xilinx and Altera software might become a distant memory and I wouldn't feel that the licensing restrictions accompanying their old software would constrain reverse engineering on a new generation.

I was intending to eventually reverse engineer some of the devices from first principles without using their software. We know that can be done to some extent just by programming bitstreams. Timing and power models are more difficult to reverse engineer, but not impossible and I had some measurement ideas, and I had in mind to additionally etch and photograph the chips as well, or perhaps use focused X-ray tomography. But that never happened; life happened instead.

Times have changed. The FPGA patents from that era have expired. You can build a decent device without infringing, in principle. There's a rapidly growing movement in open source hardware on FPGAs and even ASICs. And people have been reversing Xilinx among others, more confidently than the people of 20 years ago were willing to.

For today I have two words: QuickLogic and OpenFPGA. QuickLogic devices may be small compared with the high end, but they are explicitly supporting open source toolchains, better than Lattice's passive tolerance. This is a breath of fresh air, and I hope they are successful. OpenFPGA is actual open source FPGAs.

Re: Interview with Jim Anderson, CEO of Lattice Semiconductor

#35

Post by 1vuio0pswjnm7 »

DoingIsLearning wrote: post #2

> ... we built out a pretty significant portfolio of these applications solutions and they make it very easy for the customer to adopt our devices into their systems... Very disappointing that on the topic of Software/Toolchain it's more of the same business decisions of just copying the Xilinx/Altera paradigm. Since they seemed rather non-agressive towards Yosys/SymbiFlow they made me quite hopeful that Lattice woul…

"I am tired of vendors forcing a graphical programming toolchain that hides complexity behind half baked software."

Amen. The size of these closed source toolchains is often enormous. I wonder how many folks are not content with using relatively large Windows point-and-click software to program relatively small form factor hardware.

Re: Interview with Jim Anderson, CEO of Lattice Semiconductor

#36

Post by DoingIsLearning »

brianfaith wrote: post #22
HansHamster wrote: post #15

Earlier quoted context omitted.

And what really annoys me about Lattice in particular is that they shut down their community forum and now there is basically no way to get any form of support when using a free license. A while ago I found a bug in Lattice Radiant that produced broken PLL configurations. I reproduced this and confirmed that it doesn't happen in their iCECube software, but had no desire to argue with their support about why they shou…

While others keep their bitstreams closed and forums shut down, QuickLogic has opened theirs. They opened up the arch information needed for the open source tools to correctly support the architecture, which yields a better product for users. QuickLogic also has a forum that covers the open source tools. No need to pay to play. https://forum.quicklogic.com/

Hi Brian, welcome to HN and thank you for joining this discussion.

I will admit that QuickLogic was not a household name for me but the SoCs you have do tick a lot of boxes for me. I have now ordered a Qomu dev kit to evaluate, I am looking forward to see how the workflow/toolchain are like.

A final question, when trying to order a QuickFeather from Europe, I get a 'restricted availability' message that Mouser is unable to deliver the dev kit in my EU country due to 'government regulations'.

In the past I had to go through a few hurdles/forms when using a specific chip for a medical device because it apparently was also used in some form of US defense application. Is that something EU buyers should expect from Quicklogic products in general? It's not a show stopper but it would be good to know ahead of designing anything.

Re: Interview with Jim Anderson, CEO of Lattice Semiconductor

#37

Post by fleventynine »

grandmczeb wrote: post #32
fleventynine wrote: post #28

Earlier quoted context omitted.

Unfortunately, 10G serdes and >50kLUTs are table stakes to run the applications I have in mind...I think we're a long way from officially supported open toolchains for medium-size FPGAs.

Just curious, what kind of applications are you thinking of?

Interfacing with CMOS image sensors, basic DSP, and transmitting uncompressed 4k video over 10G or 40G Ethernet.

Re: Interview with Jim Anderson, CEO of Lattice Semiconductor

#38

Post by touisteur »

sennight wrote: post #24
touisteur wrote: post #20

Earlier quoted context omitted.

I recently discovered that Xilinx has lots of small R&D things I github. I had the opportunity to work with the team behind FINN ( https://xilinx.github.io/finn/ ) and they're trying to do everything, put everything they develop, on github. I will praise this in every future meeting I have with any Xilinx rep. I feel this is a mentality change, albeit slow, that is starting to happen. We still don't have source code…

> I feel this is a mentality change, albeit slow, that is starting to happen. Nah, at best it could be a rediscovery that took an inexplicable amount of time in the wake of the UNIX wars and dotcom bubble. If you look at paper titles from the 70s, when things were advancing at breakneck speed, you'll see "Open" commonly prefixing proposals - even stuff coming out of IBM ( sadly looks over at PS/2 doorstop ). Though,…

The people I'm talking about probably weren't there for those epic days, but I get what you're saying...

Re: Interview with Jim Anderson, CEO of Lattice Semiconductor

#39

Post by tcherasaro »

DoingIsLearning wrote: post #2

> ... we built out a pretty significant portfolio of these applications solutions and they make it very easy for the customer to adopt our devices into their systems... Very disappointing that on the topic of Software/Toolchain it's more of the same business decisions of just copying the Xilinx/Altera paradigm. Since they seemed rather non-agressive towards Yosys/SymbiFlow they made me quite hopeful that Lattice woul…

Hey, guys. Looks like I am late to the show with my comment here, but I am pushing 20 years in FPGA dev experience and hoping that maybe I can share some perspective on what seems to be a reoccurring theme on HN:

Why aren’t there any open FPGAs or at least more Open FPGA tools? Why are vendor FPGA tools so huge, terrible and hard to use? Open FPGA tools are better and the way to go! etc.

In one of Dr. Cutress’ questions he states and then asks: > … they're just hard to develop for. You need to know how to use them before you use them , which sounds like the wrong way to learn how to code! What exactly is Lattice doing to kind of ease that transition for people who may understand software, but are kind of new to the hardware?

Why is this? What can Lattice do?

It’s because one does not “code” an FPGA, they design a microchip and that process involves a lot more than writing code. It is pretty hard to do right. FPGA is on the spectrum of VLSI microchip implementation technologies. That’s why they compare FPGA’s to ASICs in the interview.

Don’t believe me? Look at this article: https://www.tutorialspoint.com/vlsi_design/vlsi_design_fpga_...

So in general the progression is FPGA -> GA (Gate Array) -> Standard Cell ASIC -> Full Custom ASIC

FPGA development is microchip development. It requires a great deal of tacit knowledge, experience and a background in electrical engineering and digital design and a number of other skills to do well.

In order to develop open tools for these devices most of the devs in the community would have to have a lot of this knowledge and experience and most if not all of the FPGA vendor’s IP on all of their devices in order to work on an open tool chain. In the end an open tool chain will do little to alleviate all the pains of the chip design process anyway so it really isn’t worth the effort to make open tools. It is way easier to just use the vendor’s tools once you know what you are doing. Most of the tools have gotten much better in the last 20 years.

That is why you will not see open tools for anything but the smallest and simplest devices that can be reverse engineered.

IMO, the best thing lattice can do for someone who doesn’t have any experience with the technology is to point them to the Lattice Partners program to find an expert to help.

I am probably not making any friends here by saying this, but I welcome any counterpoints we might argue together here.

Re: Interview with Jim Anderson, CEO of Lattice Semiconductor

#40

Post by sennight »

touisteur wrote: post #38
sennight wrote: post #24

Earlier quoted context omitted.

> I feel this is a mentality change, albeit slow, that is starting to happen. Nah, at best it could be a rediscovery that took an inexplicable amount of time in the wake of the UNIX wars and dotcom bubble. If you look at paper titles from the 70s, when things were advancing at breakneck speed, you'll see "Open" commonly prefixing proposals - even stuff coming out of IBM ( sadly looks over at PS/2 doorstop ). Though,…

The people I'm talking about probably weren't there for those epic days, but I get what you're saying...

I wonder how much that matters, and how uniformly it applies (primarily on the dimension of industry), when institutional inertia isn't perfectly aligned with employee preference. For example: Microsoft employees... lots of mixed signals. Supposedly their love of opensource has resulted in a Microsoft that no longer plots the destruction of free software, and everybody can rest assured that the bad old days are over. But when they openly protest DoD contract work, they suddenly find themselves impotent to stem the flow of HoloLens units going to the Army. Obviously there are a lot of different things at play - even within that single example, but you can find the same pattern all over the place. So I don't put a lot of weight on the employee sensibility side of the scale... despite the fact that it may diminish, to some degree, the accomplishments of the graybeards - who I venerate more than most.
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