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AMD and ARM's new CPU/GPU virtual ISA

semiaccurate.com

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Re: AMD and ARM's new CPU/GPU virtual ISA

#4

this is awesome. i had no idea anything like this was coming. is there anything out else out there that confirms this? and will it extend upwards to include bulldozer too?

You can find the whole main presentation here: http://developer.amd.com/documentation/presentations/assets/... I'm presuming stuff coming from amd.com is confirmation. It should certainly include future products, what I would worry about is to what extent existing graphics cards will be able to take advantage of this.

Generally, I'd say this looks a lot like Clang but with better ways to express memory parralelism at least. No way to know at this point to what extent this will catch on, but it looks interesting.

Re: AMD and ARM's new CPU/GPU virtual ISA

#8
post #4

this is awesome. i had no idea anything like this was coming. is there anything out else out there that confirms this? and will it extend upwards to include bulldozer too?

You can find the whole main presentation here: http://developer.amd.com/documentation/presentations/assets/... I'm presuming stuff coming from amd.com is confirmation. It should certainly include future products, what I would worry about is to what extent existing graphics cards will be able to take advantage of this. Generally, I'd say this looks a lot like Clang but with better ways to express memory parralelism at…

I think it's bigger than that - the idea that a GPU can execute syscalls is pretty crazy if you really buy into it (i.e. the entire OS is running using this heterogenous environment)

Re: AMD and ARM's new CPU/GPU virtual ISA

#9
post #6

Wouldn't a virtual ISA be against the interests of hardware designers who benefit from ISA lockin?

It would but none of the players have the mindshare, capital or cred to do this. We are at a near perfect astable state in terms of competition. I am really stoked about all of this.

Re: AMD and ARM's new CPU/GPU virtual ISA

#10
This is makes sense, esp with regards to the scalar core that is being included in the CU. Most likely that scalar core is ARM derived.

I made noises that AMD needed to remove 32 bit and SSE and just focus on OpenCL. What is being speculated actually reaches much farther than that and is a better design. Thanks for the clue stick.

Also more corroborating evidence, Anton Chernoff one of the main creators of FX!32 (http://en.wikipedia.org/wiki/FX!32) works for AMD Boston. FX!32 was/is one of the most badass dynamic recompilation engines I have ever witnessed. It could load X86 executables and effectively JIT them to Alpha. This is the kinda of technology needed to support a virtual ISA.

Anton Chernoff http://www.linkedin.com/pub/anton-chernoff/1/59/6b2

http://www.usenix.org/publications/library/proceedings/useni...

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