ESP32-C6, a Wi-Fi 6 and Bluetooth 5 (LE) SoC

Post by Kliment » Sat, Apr 10, 2021, 4:34 PM UTC

PixelOfDeath wrote: post #65

Kliment wrote: post #33

Earlier quoted context omitted.

Have you seen the die images of the ESP32? Basically the entire die area is SRAM. SRAM eats a ton of space, and with a bigger die area you have a much higher likelihood per part that you will have a defect and have to scrap the entire chip.

Isn't memory the easiest part to remap to use build in redundancies during the factory testing of the chip?

Post by baybal2 » Sat, Apr 10, 2021, 4:38 PM UTC

qalmakka wrote: post #26

Why didn't they pack more ram on this? 400K is a bit tight, we often hit the ceiling with the ESP32's 512K of internal RAM. Does anyone know if they support SPI-connected external RAM on this? It has been a lifesaver on the ESP32, especially since WROVER-E fixed most of the long standing bugs that were plaguing the earlier revisions. It is slow as hell, but having 4MB (+4MB high memory) of connected RAM on a microcon…

Post by AlpineG » Sat, Apr 10, 2021, 5:37 PM UTC

lioeters wrote: post #63

qalmakka wrote: post #26

Why didn't they pack more ram on this? 400K is a bit tight, we often hit the ceiling with the ESP32's 512K of internal RAM. Does anyone know if they support SPI-connected external RAM on this? It has been a lifesaver on the ESP32, especially since WROVER-E fixed most of the long standing bugs that were plaguing the earlier revisions. It is slow as hell, but having 4MB (+4MB high memory) of connected RAM on a microcon…

Thanks for mentioning the possibility to extend RAM on an ESP32. Found the official documention about it: https://docs.espressif.com/projects/esp-idf/en/latest/esp32/... > ESP32 has the ability to also use up to 4 MB of external SPI RAM memory. > The external memory is incorporated in the memory map and, with certain restrictions, is usable in the same way as internal data RAM. > While ESP32 is capable of supporting…

Post by PixelOfDeath » Sat, Apr 10, 2021, 7:59 PM UTC

Kliment wrote: post #91

PixelOfDeath wrote: post #65

Earlier quoted context omitted.

Isn't memory the easiest part to remap to use build in redundancies during the factory testing of the chip?

Sure, if you add extra remapping hardware, nonvolatile storage, and eat the performance penalties. Makes sense for massive quantities of crappy cheap flash, not so much for this.

Post by djrogers » Sat, Apr 10, 2021, 8:51 PM UTC

fy20 wrote: post #58

audunw wrote: post #38

I really wish Thread mesh networking would become standard on new Wi-Fi routers. Google Nest has hardware support for it, but not sure if it's enabled yet. I think Thread is a much better fit for IP connectivity for IoT devices. Nordic Semiconductor nRF SoCs can do Bluetooth LE and Thread on the same radio at the same time, so should be very cost effective. I'd gladly replace all my Zigbee devices with Thread ones if…

Is Thread still happening? Last time I checked the only hub available was Nest, although Apple hardware has support but it's not enabled in software. Other than a couple of niche home automation products, nothing supports it. When will I be able to buy smart light bulbs for $10 that use Thread?