Earlier quoted context omitted.
Isn’t the issue with AVX-512 is that different CPUs support different instructions? https://en.m.wikipedia.org/wiki/AVX-512 It might eventually get normalized but atm it’s a bit of a mess.
It's a bit less messy if you ignore the GPU-like Xeon Phi ( Knights Landing and Knights Mill ) and the failed Cannonlake that Intel definitely would prefer everyone pretend never happened. But that still leaves you with a progression of four levels of expanding support, and the Cooper Lake mess of having BFLOAT16 but not the stuff added in Ice Lake and Tiger Lake . If you don't cut down the support table to eliminate…
There is also the big unknown of what kind of support AMD will bring to the table.
I think Intel is banking on people using OneAPI more than writing AVX-512 code using intrinsics or compiler magic.
At that point compatibility might be not as much of an issue if you ignore potentially drastic differences in performance.