I remember reading some story way back with some ... Sony exec? Someone saying that there were people writing engine code in Excel to be able to track the co processors and get the timing right. Does anyone know of the truthiness of such a story? I'm learning FPGA design and even there, when timing is pretty controlled, people end up recommending design patterns where you gate stuff similar to how you would do it in…
Architecture of the Playstation 2
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Re: Architecture of the Playstation 2
#12Re: Architecture of the Playstation 2
#13I remember reading some story way back with some ... Sony exec? Someone saying that there were people writing engine code in Excel to be able to track the co processors and get the timing right. Does anyone know of the truthiness of such a story? I'm learning FPGA design and even there, when timing is pretty controlled, people end up recommending design patterns where you gate stuff similar to how you would do it in…
Re: Architecture of the Playstation 2
#14Sick of being accused of being racist just because I wanted a PS2 in a white case.
Re: Architecture of the Playstation 2
#15This reminds me of my homebrew days making custom Guitar Hero 2 tracks. There was a great modding community (scorehero.com) around. This was before DLC was a thing, so if I wanted more content, I had to make it myself.
Re: Architecture of the Playstation 2
#16I remember reading some story way back with some ... Sony exec? Someone saying that there were people writing engine code in Excel to be able to track the co processors and get the timing right. Does anyone know of the truthiness of such a story? I'm learning FPGA design and even there, when timing is pretty controlled, people end up recommending design patterns where you gate stuff similar to how you would do it in…
I bet they were writing Vector Unit assembly in Excel. The VLIW design meant that you literally packed 2 assembly instructions together into a 64-bit word. Each side had it's own subset of execution units it could utilize and would have it's own separate latency for each operation. So, to keep track of everything going on you pretty much had to write out two columns of code containing your own no-op notation to repre…
Re: Architecture of the Playstation 2
#17Earlier quoted context omitted.
I bet they were writing Vector Unit assembly in Excel. The VLIW design meant that you literally packed 2 assembly instructions together into a 64-bit word. Each side had it's own subset of execution units it could utilize and would have it's own separate latency for each operation. So, to keep track of everything going on you pretty much had to write out two columns of code containing your own no-op notation to repre…
Hopefully the Vector Unit assembly didn't require more than 16,384 lines of code if they were using Excel 95.
Re: Architecture of the Playstation 2
#18The PlayStation 2 is actually one of the original reasons I got interested in the computer engineering space. The EE chip is a sort of who's-who of optimization techniques - hardware decoding, vector processing, VLIW architecture (for the VUs), memory bandwidth tailored to keeping the huge amount of functional units busy with a constant stream of math to do. At some point I got a port of Debian (BlackRhino GNU/Linux)…
Re: Architecture of the Playstation 2
#19The author is correct that official uses for the MagicGate-encrypted system updates were few and far between, effectively "never", but there were a couple!
There was a DVD Player installer/updater for early console models that shipped before that software was finalized, and in Japan there was an entire "Browser 2.0" update that enabled a full HDD OSD unlike the bare-bones HDD Utility Disc we got in US/Europe regions! https://youtu.be/dJnLJxVljGw?t=509
The first revision of slim PS2 still has the 40-pin ATA header on the motherboard, and it works if you solder on a connector, so who knows what could have been.
Re: Architecture of the Playstation 2
#20I remember reading some story way back with some ... Sony exec? Someone saying that there were people writing engine code in Excel to be able to track the co processors and get the timing right. Does anyone know of the truthiness of such a story? I'm learning FPGA design and even there, when timing is pretty controlled, people end up recommending design patterns where you gate stuff similar to how you would do it in…
I bet they were writing Vector Unit assembly in Excel. The VLIW design meant that you literally packed 2 assembly instructions together into a 64-bit word. Each side had it's own subset of execution units it could utilize and would have it's own separate latency for each operation. So, to keep track of everything going on you pretty much had to write out two columns of code containing your own no-op notation to repre…