I'm one of the authors of the published paper that IEEE Spectrum referred to in the post. First off, thanks for posting! We're so delighted to see our work garner general interest! A few friends and relatives of mine mentioned that they came across my work by chance on Hacker News. I already noticed the excellent questions and excellent responses already provided by the community.
This comment might get buried but I'd just like to mention a few things:
- Indeed, we took into account the additional energy cost of cooling in the "80x" advantage quoted in the article. This is based on a cryocooling efficiency of 1000 W at room temperature per Watt dissipated at cryotemps (4.2 Kelvin). This 1000W/W coefficient is commonly used in the superconductor electronics field. The switching energy of 1.4 zJ per device is quite close to the Landauer limit as mentioned in the comments but this assumes a 4.2 K environment. With cryocooling, the 1000x factor brings it to 1.4 aJ per device. Still not bad compared to SOTA FinFETs (~80x advantage) and we believe we can go even lower with improvement in our technology as well as cryocooling technology. The tables in Section VI of the published paper (open-access btw) goes on to estimate what a supercomputer using our devices might look like using helium referigeration systems commercially available today (which have an even more efficient ~400W/W cooling efficiency). The conclusion: we may easily surpass the US Department of Energy's exascale computing initiative goal of 1 exaFLOPS within a 20-MW power budget, some thing that's been difficult using current tech (although HP/AMD's El Capitan may finally get there, we may be 1-2 orders of magnitude better assuming a similar architecture).
- Quantum computers require very very low temps (0.015 K for IBM vs the 9.3 K for niobium in our devices). With the surge in superconductor-based quantum computing research, we expect new developments in cryocooling tech which would be very helpful for us to reduce the "plug-in" power.
- Our circuits are adiabatic but they're not ideal devices hence we still dissipate a tiny bit of energy. We have ideas to reduce the energy even further through logically and physically reversible computation. The trade-off is more circuit area overhead and generation of "garbage" bits that we have to deal with.
- The study featured only a prototype microprocessor and the main goal was to demonstrate that these AQFP devices can indeed do computation (processing and storage). Through the experience of developing this chip, it helped revealed the practical challenges in scaling up, and our new research directions are aggressively targetting them.
- The circuits are also suitable for the "classical" portion of quantum computing as the controller electronics. The advantage here is we can do classical processing close to the quantum computer chip which can help reduce the cable clutter going in/out of the cryocooling system. The very low-energy dissipation makes it less likely to disturb the qubits as well.
- We also have ideas on how to use the devices to build artificial neurons for AI hardware, and how we can implement hashing accelerators for cryptoprocessing/blockchain. (all in the very early stages)
- Other superconductor electronics showed super fast 700+ GHz gates but the power consumption is through the roof even before taking into account cooling. There are other "SOTA" superconductor chips showing more Josephson junction devices on a chip... many of those are just really long shift-registers that don't do any meaningful computation (useful for yield evaluation though) and don't have the labyrinth of interconnects that a microprocessor has.
- There are many pieces to think about: physics, IC fabrication, analog/digital design, architecture, etc. to make this commercially viable. At the end of the day, we're still working on the tech and trying to improve it, and we hope this study is just the beginning of some thing exciting.