MyNOR: Single board computer that uses a single NOR gate as its ALU

> "There are two ways of constructing a software design: One way is to make it so simple that there are obviously no deficiencies, and the other way is to make it so complicated that there are no obvious deficiencies. The first method is far more difficult."

I've been thinking about this too. I don't think the hardware needs to be this weak/slow. It just needs to be analyzable. Modern silicon chips can only be inspected with electron microscopes, and even then, they have multiple layers, so it's a non-starter. You could probably spend multiple lifetimes studying a modern chip.

On the other hand, if you take a chip like the good old ARM1, it's a 32-bit chip with no cache and about 25K transistors. If you fabricated it with an older process, with a single layer, it might be possible to inspect it with a regular microscope, and you could use basic computer vision to compare the layout against a reference implementation that you have an HD picture of. It's a relatively weak chip, but you may be able to clock it at 50 or 100 MHz. It's fast enough to run basic UI apps and networked services. It's 32-bit so you could address a few gigabytes of RAM (well, maybe not with an ARM1 design, but with a comparable 32-bit RISC-V, say).

https://www.researchgate.net/profile/Kaiyuan_Yang5/publicati...

Abstract:

> While the move to smaller transistors has been a boon for performance it has dramatically increased the cost to fabricate chips using those smaller transistors. This forces the vast majority of chip design companies to trust a third party -- often overseas -- to fabricate their design. To guard against shipping chips with errors (intentional or otherwise) chip design companies rely on post-fabrication testing. Unfortunately, this type of testing leaves the door open to malicious modifications since attackers can craft attack triggers requiring a sequence of unlikely events, which will never be encountered by even the most diligent tester. In this paper, we show how a fabrication-time attacker can leverage analog circuits to create a hardware attack that is small (i.e., requires as little as one gate) and stealthy (i.e., requires an unlikely trigger sequence before effecting a chip's functionality). In the open spaces of an already placed and routed design, we construct a circuit that uses capacitors to siphon charge from nearby wires as they transition between digital values. When the capacitors fully charge, they deploy an attack that forces a victim flip-flop to a desired value. We weaponize this attack into a remotely-controllable privilege escalation by attaching the capacitor to a wire controllable and by selecting a victim flip-flop that holds the privilege bit for our processor. We implement this attack in an OR1200 processor and fabricate a chip. Experimental results show that our attacks work, show that our attacks elude activation by a diverse set of benchmarks, and suggest that our attacks evade known defenses.

To me it's not really an ALU either, since the NOR gate doesn't really do the job I expect from an ALU.