Intel Reinvents Transistors Using New 3-D Structure • Hacker News Board

Re: Intel Reinvents Transistors Using New 3-D Structure

#101

Post by SlipperySlope » Thu, May 05, 2011, 7:11 PM UTC

nextparadigms wrote: post #83

SlipperySlope wrote: post #56

Earlier quoted context omitted.

Intel is projecting to be at 10nm in 2015, way ahead of the industry lithography roadmaps published five or ten years ago. Below 10nm, Intel and other fabricators will start looking beyond CMOS, perhaps to carbon based structures.

I wouldn't say way ahead. They are about a generation ahead. When Intel was at 45, the ARM makers were 65. Intel at 32, ARM makers at 40/45. When Intel will be at 22. ARM makers will be at 28/32. When they'll be at 10nm, ARM will be at 14nm using IBM's foundry.

I agree with what you said, but I'm sorry you misunderstood my point. The ITRS lithography roadmaps for years have assumed that lithography would advance at the rate of 36 months between nodes, e.g. between 45nm and 32nm. But in response to AMD competition in the previous decade, Intel introduced their "tick-tock" cycle in which Intel advances the lithography node every 24 months. Other CPU fabricators have been forced to keep up with Intel's pace, and as you point out they have been a process generation behind.

As a result, 10nm will be released in 2015, rather than 2020 as ITRS predicted in much earlier roadmaps.

What gets real interesting in just a few years is how Intel and others will get below 10nm. Could be a shift to carbon based structures will be necessary.

Re: Intel Reinvents Transistors Using New 3-D Structure

#102

Post by SlipperySlope » Thu, May 05, 2011, 7:19 PM UTC

JacobAldridge wrote: post #94

acgourley wrote: post #84

"Moore's Law" is mentioned 14 times.

I wonder if Gordon Moore had worked for IBM instead of being an Intel founder, whether that number may have been a slight bit smaller.

Absolutely! IBM's was never motivated to improve performance for their mainframe and minicomputers as quickly as Intel improved performance for microprocessors.

Really, Moore's law is a sort of management principle rather than any kind of physical law. Simply, Intel introduces new fabrication process technology at the pace which optimises their profits.

Advance too slow and competitors will take the business, advance too fast and capital costs are higher, plus customers need payback on their current purchases. Advance at just the right pace and customers are motivated to replace perfectly good products just a few years old.

Re: Intel Reinvents Transistors Using New 3-D Structure

#103

Post by pfatehi » Sat, May 07, 2011, 10:13 PM UTC

megaframe wrote: post #53

bradly wrote: post #11

Anyone know if the 3D structure is patented by Intel? If so, wouldn't this give Intel a monopoly on transistors given how much better this new design performs?

No this design was developed back when I was in college, the revolutionary change here is that Intel has a process to actually manufacture these things effectively and get decent yield. IBM had these things built in test cases back in 2007 but didn't have a manufacturing method. Intel will likely not patent or reveal the manufacturing method thats how most semiconductor manufacturing technologies go. They tend to be…

here's another one:

"TRI-GATE DEVICE WITH CONFORMAL PVD WORKFUNCTION METAL ON ITS THREE-DIMENSIONAL BODY AND FABRICATION METHOD THEREOF"

http://www.freepatentsonline.com/y2008/0157207.html

Re: Intel Reinvents Transistors Using New 3-D Structure

#104

Post by pfatehi » Sat, May 07, 2011, 10:28 PM UTC

megaframe wrote: post #53

bradly wrote: post #11

Anyone know if the 3D structure is patented by Intel? If so, wouldn't this give Intel a monopoly on transistors given how much better this new design performs?

No this design was developed back when I was in college, the revolutionary change here is that Intel has a process to actually manufacture these things effectively and get decent yield. IBM had these things built in test cases back in 2007 but didn't have a manufacturing method. Intel will likely not patent or reveal the manufacturing method thats how most semiconductor manufacturing technologies go. They tend to be…

"An alternative to the standard methods of building planar MOSFETs has been proposed to help alleviate some of the physical barriers to scaling down existing designs. These proposals involve the construction of three dimensional MOSFETs either in the form of a dual-gate transistor (FinFET) or as a tri-gate transistor as a replacement for the conventional planar MOSFET."