Live data from Hacker News

ESP32-C3 WiFi and BLE RISC-V processor is pin-to-pin compatible with ESP8266

cnx-software.com

1–10 of 119 posts

Re: ESP32-C3 WiFi and BLE RISC-V processor is pin-to-pin compatible with ESP8266

#2
Nice. The XTensa cores always felt weird.

Too bad they only included the I/M/C extensions - no floats, vectors, or atomics. And USB would be nice (nevermind, it has USB :D).

But it's still very exciting. Maybe there'll be less conflict between ARM/XTensa/PIC32/etc. cores in the coming years.

Re: ESP32-C3 WiFi and BLE RISC-V processor is pin-to-pin compatible with ESP8266

#4
This is really nice, riscv plus Wifi and BT will be a dream for hackers provided the chip and firmware is well documented. The datasheet is also in the comments (https://mega.nz/file/nk41mSAL#R_d0njlKRb-aIoGuX6JXUB5eeflAdy... )(chinese pdf) : 160MHz 400k sram apparently single core.

Re: ESP32-C3 WiFi and BLE RISC-V processor is pin-to-pin compatible with ESP8266

#6
post #4

This is really nice, riscv plus Wifi and BT will be a dream for hackers provided the chip and firmware is well documented. The datasheet is also in the comments ( https://mega.nz/file/nk41mSAL#R_d0njlKRb-aIoGuX6JXUB5eeflAdy... )(chinese pdf) : 160MHz 400k sram apparently single core.

Some reason this didn't work, someone made an English translation https://mega.nz/file/4VRGgLzK#YIzeMvj_Z-LayxY8KztL4WiifcmQYc...

Re: ESP32-C3 WiFi and BLE RISC-V processor is pin-to-pin compatible with ESP8266

#7

Nice. The XTensa cores always felt weird. Too bad they only included the I/M/C extensions - no floats, vectors, or atomics. And USB would be nice (nevermind, it has USB :D). But it's still very exciting. Maybe there'll be less conflict between ARM/XTensa/PIC32/etc. cores in the coming years.

I believe the problem was XTensas not being available in hard macros, or at least Chen will not sell them at a price point a mortal can afford.

That's a huge thing when power efficiency, and operation from battery mattered.

Re: ESP32-C3 WiFi and BLE RISC-V processor is pin-to-pin compatible with ESP8266

#8

> Pricing will also be similar to ESP8266. How can they possibly sell these chips at these prices? This is impossibly cheap. You can’t even accuse them of trying to flood and control the market because they already own the market!

what market are you talking about? hobby projects market? that's for sure, but that's not where the big money is.

Re: ESP32-C3 WiFi and BLE RISC-V processor is pin-to-pin compatible with ESP8266

#9
post #4

This is really nice, riscv plus Wifi and BT will be a dream for hackers provided the chip and firmware is well documented. The datasheet is also in the comments ( https://mega.nz/file/nk41mSAL#R_d0njlKRb-aIoGuX6JXUB5eeflAdy... )(chinese pdf) : 160MHz 400k sram apparently single core.

Some reason this didn't work, someone made an English translation https://mega.nz/file/4VRGgLzK#YIzeMvj_Z-LayxY8KztL4WiifcmQYc...

The comment parent to yours had a closing parentheses and stuff after the link that broke it.

The link for the Chinese pdf is https://mega.nz/file/nk41mSAL#R_d0njlKRb-aIoGuX6JXUB5eeflAdy...

Re: ESP32-C3 WiFi and BLE RISC-V processor is pin-to-pin compatible with ESP8266

#10

Nice. The XTensa cores always felt weird. Too bad they only included the I/M/C extensions - no floats, vectors, or atomics. And USB would be nice (nevermind, it has USB :D). But it's still very exciting. Maybe there'll be less conflict between ARM/XTensa/PIC32/etc. cores in the coming years.

Why do you need atomics on a single core device?
Post reply on HN