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Apple’s A14 Packs 134M Transistors/mm²

semianalysis.com

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Re: Apple’s A14 Packs 134M Transistors/mm²

#81

Post by m463 »

topspin wrote: post #20

I really appreciate this analysis and the straightforward top line number 134e6/mm^2. The usual "node" figure is utterly meaningless; an electrical engineer couldn't care less about "feature" size (whatever that means.) What is the count of discrete components in a given area? There are 40 billion 5nm (the supposed "node" of these chips) squares in a millimeter of area. That's two orders of magnitude more dense than…

"As of 2019, the highest transistor count in any IC chip is Samsung's 1 TB eUFS (3D-stacked) V-NAND flash memory chip, with 2 trillion floating-gate MOSFETs (4 bits per transistor)." [1]

How about bit count? (at 4 bits per transistor)

[1] https://en.wikipedia.org/wiki/Transistor_count

Re: Apple’s A14 Packs 134M Transistors/mm²

#82

Post by ghettoimp »

jacobolus wrote: post #50
jiggawatts wrote: post #32

Earlier quoted context omitted.

I was just looking into optimising a large web application. I told the customer that using a caching layer such as a CDN would help paper over the worst of the inefficiencies in their application and the network stack. That was true! The download times halved. However, benchmarks with F12 developer tools showed that while downloads reduced from 200ms to 100ms, the overall load times were still seconds, of which about…

There is no speed of computer which cannot be overwhelmed by badly written code. I guess your point is that sloppy web developers / web companies make poorly performing code and shift the burden of handling it out to visitors’ machines, so those machines have to keep improving to not be left behind? That might be true, but is pretty depressing.

I think "fast, cheap, good, pick 2" applies. Obviously the current bloated, ad-laden state of the web is pretty horrible and indefensible. But if we can keep making compute faster, it should ultimately save programmer time, which can be used to either get cheaper or better programs.

Re: Apple’s A14 Packs 134M Transistors/mm²

#83

Post by Tuna-Fish »

ineedasername wrote: post #22

What's the relative heat dissipation between logic & SRAM on a chip? The article talks about layering as a potential way forward for SRAM, but that would come with more complex TDP management, unless SRAM isn't burning watts at the same rate as the rest of the chip.

SRAM can potentially use very little power on modern processes, depending on how fast you want to be able to access it.

If you are just making a relatively low-speed L3, getting rid of the heat produced in the SRAM itself will never be a problem. In general, the problem in SRAM layered on chip is considered to be that the stacked dies are a very good insulator, so the hot active die on the bottom will have heat dissipation problems.

Re: Apple’s A14 Packs 134M Transistors/mm²

#84

Post by Polylactic_acid »

manmal wrote: post #19
talentedcoin wrote: post #6

I think this is cool if they’re the future of the Mac, but aren’t these chips just wasted in the iPad? I say this as an iPad Pro (1st-gen) owner ... it’s already way more processing power than I can really use, because after trying for months to get a sensible workflow going (mostly based around Pythonista, Editorial and RealVNC) I’ve relegated it to a OneNote and Netflix machine. What’s the point other than the cool…

Having a more-powerful-than-necessary CPU has many benefits, here are some: - Less heat produced > allows for smaller heatsinks and, as a result, smaller devices or bigger components - Performance bottlenecks become less likely - Features like 120hz display refresh rate become possible without the user noticing degradation - Faster OS boot and app starts - Ability to do more work locally vs using a server (see the ma…

Not to mention it extends the life of the device. If a device is only just good enough for now, what will it be like in 4 years time. I currently use a 6 year old ipad air 2 and it feels very snappy and does everything I use it for well. Apple also tends to stop updates when the hardware is no longer capable of running the next OS smoothly.

Re: Apple’s A14 Packs 134M Transistors/mm²

#85

Post by coherentpony »

hinkley wrote: post #63
coherentpony wrote: post #49

Earlier quoted context omitted.

These things aren't _really_ two-dimensional. They're not really three-dimensional either, but they are objects built out of layers of two-dimensional things. When you measure number of transistors per unit area you will inevitably see something more dense than the "number of 5nm square in a millimeter of area". It's the silicon equivalent of measuring one's BMI.

Video games used to call their pseudo-3d display 2.5D, or if they were feeling fancy, isomorphic. There is a little freedom in the Z axis, but not very much. But if speed of light matters to performance, then a chip design that increases the z axis decreases the euclidean distance between any two gates, which should (or at least could) matter to performance, right?

Ultimately it depends on the design but you're basically right, yes.

Re: Apple’s A14 Packs 134M Transistors/mm²

#86

Post by urthor »

Reason077 wrote: post #34
urthor wrote: post #25

Earlier quoted context omitted.

Never underestimate the PUBG Mobile/Genshin Impact demographic basically. There's a lot of corner cases there where certain consumers value it a lot. Also performance per watt is a huge deal. The expanded power envelope that improved PPW brings allows 120hz displays which are battery hogs.

I wonder if Apple Silicon means we might finally get PUBG on Mac. If they can make it work on an iPad, they can make it work on a Mac with similar hardware... right?! I'm already missing the glorious few months that PUBG could be played on Mac via Stadia.

Basically, no. The issue was never the instruction set, you still have to support the interface and the OS which nobody is bothered to do because cost benefit.

Changing the chip isn't going to change the code base of the operating system.

Re: Apple’s A14 Packs 134M Transistors/mm²

#87

Post by baybal2 »

bhj wrote: post #68
manmal wrote: post #19

Earlier quoted context omitted.

Having a more-powerful-than-necessary CPU has many benefits, here are some: - Less heat produced > allows for smaller heatsinks and, as a result, smaller devices or bigger components - Performance bottlenecks become less likely - Features like 120hz display refresh rate become possible without the user noticing degradation - Faster OS boot and app starts - Ability to do more work locally vs using a server (see the ma…

Battery life. The faster a task is completed (at a given power cost) the sooner the CPU can go back to standby.

Not so fast, especially these days. CPU power consumption is highly non-linear.

You may well be benefitting from running a task longer, at a slower speed, and using less transistors.

Re: Apple’s A14 Packs 134M Transistors/mm²

#88

Post by izacus »

mucle6 wrote: post #78
Godel_unicode wrote: post #54

Earlier quoted context omitted.

Sounds like the argument here is "buy an iPad pro so frontend developers don't need to learn optimization"...?

Buy an iPad pro because time and time again we have seen that optimizing is not a priority for the majority of business. I think the cynicism here is that if only these frontend developers would just learn to optimize we would all finally be better off. I think there are two factors that push against this though. First, if you learn to optimize then you can charge more for your labor, and you will likely get a job so…

Which just means that your 1200$ iPad Pro will be slow in a year because the treadmill will continue.

Re: Apple’s A14 Packs 134M Transistors/mm²

#89

Post by urthor »

ajross wrote: post #35
rdw wrote: post #3

The article says that Apple isn't making full use of the 5nm process node, and blames lack of SRAM scaling for it (presumably due to the large amount of L3 cache). Is this a problem that all processors are about to hit, or is this going to be overcome once process engineers are more familiar with 5nm?

This bit didn't make a lot of sense to me. SRAM is routinely the MOST optimized and MOST worried-over aspect of silicon layout. SRAM cell architectures get hand-optimized carefully years in advance of any process improvements. They aren't just logic that gets spit out of generic tooling. So while it would make sense that a new process would have new design rule that didn't map well to older EDA tooling, it's harder t…

It's not uncommon for different components to scale differently.

They're often literally made out of different metals that have different resistance characteristics at different wire gauges, for example.

Interconnects was a very famous case, but many aspects of electrical engineering change when you get that small, because hey if you shrink the diameter of a wire by half guess what happens to the volume.

Semiconductor engineering is the field of dealing with a thousand of these tiny problems, and an improvement in the photolithography wavelengths is actually an abstraction of solving the thousands of tiny problems involved with all the different materials.

Re: Apple’s A14 Packs 134M Transistors/mm²

#90

Post by mceachen »

centimeter wrote: post #23
talentedcoin wrote: post #6

I think this is cool if they’re the future of the Mac, but aren’t these chips just wasted in the iPad? I say this as an iPad Pro (1st-gen) owner ... it’s already way more processing power than I can really use, because after trying for months to get a sensible workflow going (mostly based around Pythonista, Editorial and RealVNC) I’ve relegated it to a OneNote and Netflix machine. What’s the point other than the cool…

I bought my iPad Pro because it offered the smoothest RAW photo proofing process of any product I've used. A lot of this is obviously up to software as well as hardware, but still - the beefy processor is useful here.

Faster CPUs certainly help everything go faster, but what you're asking of the CPU may matter much more than how fast the CPU is.

RAW processing is actually a really interesting application, and rendering time depends heavily on what you do with the bits from the sensor.

If you use non-linear interpolation, 2-50x the time to build.

If you do highlight recovery, 2-5x the time to build.

If you only need half the native resolution, build time may be reduced 2-4x.

Basically "viewing a RAW image" can take 100 milliseconds or 15 seconds (on the same hardware!), depending on how you're interpreting the sensor data.

(Source: playing with dcraw and libraw to rasterize raw images for PhotoStructure)

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