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ARM chips have an instruction with JavaScript in the name

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Re: ARM chips have an instruction with JavaScript in the name

#51
post #37

Earlier quoted context omitted.

Correct, the overhead is minimal - it basically just makes the float->int conversion use a fixed set of rounding and clamping modes, irrespective of what the current mode flags are set to. The problem is JS's double->int conversion was effectively defined as "what wintel does by default", so on arm, ppc, etc you need a follow on branch that checks for the clamping requirements and corrects the result value to what x8…

Interesting. So it's as much an x86 legacy issue as JS and presumably JS followed x86 because it was more efficient to do so (or maybe by default). Sounds too like performance gains will depend on how often the branch is taken which seems highly dependent on the values that are being converted?

> Interesting. So it's as much an x86 legacy issue as JS and presumably JS followed x86 because it was more efficient to do so (or maybe by default).

Most languages don't start with a spec, so the semantics of a lot of these get later specced as "uhhhhh whatever the C compiler did by default on the systems we initially built this on".

Re: ARM chips have an instruction with JavaScript in the name

#52
post #49

If anybody else was curious, it appears that the performance win of use of this instruction looks to be about 1-2% in general javascript workloads: https://bugs.webkit.org/show_bug.cgi?id=184023#c24

Is that significant enough to justify the instruction?

Nothing justifies the prolonging of Javascript torture.

Re: ARM chips have an instruction with JavaScript in the name

#53

Earlier quoted context omitted.

Interesting. So it's as much an x86 legacy issue as JS and presumably JS followed x86 because it was more efficient to do so (or maybe by default). Sounds too like performance gains will depend on how often the branch is taken which seems highly dependent on the values that are being converted?

> Interesting. So it's as much an x86 legacy issue as JS and presumably JS followed x86 because it was more efficient to do so (or maybe by default). Most languages don't start with a spec, so the semantics of a lot of these get later specced as "uhhhhh whatever the C compiler did by default on the systems we initially built this on".

Seeing as JavaScript was designed and implemented in two weeks, I'm betting this is the answer

Re: ARM chips have an instruction with JavaScript in the name

#54
post #49

If anybody else was curious, it appears that the performance win of use of this instruction looks to be about 1-2% in general javascript workloads: https://bugs.webkit.org/show_bug.cgi?id=184023#c24

Is that significant enough to justify the instruction?

A great question for the folks who actually do CPU design! As somebody who writes JS rather frequently I’m not complaining.

Re: ARM chips have an instruction with JavaScript in the name

#55

Earlier quoted context omitted.

Interesting. So it's as much an x86 legacy issue as JS and presumably JS followed x86 because it was more efficient to do so (or maybe by default). Sounds too like performance gains will depend on how often the branch is taken which seems highly dependent on the values that are being converted?

The branch always has to be taken if executing JavaScript, because otherwise how would you tell if the value was correct or not? You'd have to calculate it using this method regardless and then compare!

What are you defining as correct?

Re: ARM chips have an instruction with JavaScript in the name

#56

Earlier quoted context omitted.

Interesting. So it's as much an x86 legacy issue as JS and presumably JS followed x86 because it was more efficient to do so (or maybe by default). Sounds too like performance gains will depend on how often the branch is taken which seems highly dependent on the values that are being converted?

> Interesting. So it's as much an x86 legacy issue as JS and presumably JS followed x86 because it was more efficient to do so (or maybe by default). Most languages don't start with a spec, so the semantics of a lot of these get later specced as "uhhhhh whatever the C compiler did by default on the systems we initially built this on".

It was 100% [ed] due to [/ed] the default wintel behavior. All other architectures have to produce the same value for that conversion.

Re: ARM chips have an instruction with JavaScript in the name

#57
post #2

Unless I misread the current arm docs, I don't think this is still present in the ISA as of 2020? The whole RISC/CISC thing is long dead anyway, so I don't really mind having something like this on my CPU. Bring on the mill (I don't think it'll set the world on fire if they ever make it to real silicon but it's truly different)

What does it mean for the RISC/CISC thing to be dead? The distinction between them is more blurred than it used to be?

Re: ARM chips have an instruction with JavaScript in the name

#58
post #2

Unless I misread the current arm docs, I don't think this is still present in the ISA as of 2020? The whole RISC/CISC thing is long dead anyway, so I don't really mind having something like this on my CPU. Bring on the mill (I don't think it'll set the world on fire if they ever make it to real silicon but it's truly different)

To understand RISC, ignore the acronym it stands for, instead just think fixed-instruction, load-store architecture. That's what RISC really means today. No variable-length instructions. No arithmetic instructions that can take memory operands, shift them, and update their address at the same time.

> No variable-length instructions

AESE / AESMC (AES Encode, AES Mix-columns) are an instruction pair in modern ARM chips in which the pair runs as a singular fused macro-op.

That is to say, a modern ARM chip will see "AESE / AESMC", and then fuse the two instructions and execute them simultaneously for performance reasons. Almost every "AESE" encode instruction must be followed up with AESMC (mix columns), so this leads to a significant performance increase for ARM AES instructions.

Re: ARM chips have an instruction with JavaScript in the name

#59
post #2

Unless I misread the current arm docs, I don't think this is still present in the ISA as of 2020? The whole RISC/CISC thing is long dead anyway, so I don't really mind having something like this on my CPU. Bring on the mill (I don't think it'll set the world on fire if they ever make it to real silicon but it's truly different)

To understand RISC, ignore the acronym it stands for, instead just think fixed-instruction, load-store architecture. That's what RISC really means today. No variable-length instructions. No arithmetic instructions that can take memory operands, shift them, and update their address at the same time.

Someone once explained it like “not a reduced set, but a set of reduced instructions”. Not r(is)c, but (ri)sc.

Pretty much what you say, I just liked the way of describing it.

Re: ARM chips have an instruction with JavaScript in the name

#60
Emery Berger argues that the systems community should be doing exactly this -- improving infrastructure to run JS and Python workloads:

https://blog.sigplan.org/2020/10/12/from-heavy-metal-to-irra...

We need to incorporate JavaScript and Python workloads into our evaluations. There are already standard benchmark suites for JavaScript performance in the browser, and we can include applications written in node.js (server-side JavaScript), Python web servers, and more. This is where cycles are being spent today, and we need evaluation that matches modern workloads. For example, we should care less if a proposed mobile chip or compiler optimization slows down SPEC, and care more if it speeds up Python or JavaScript!

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