11–20 of 55 posts
I’d previously missed this piece of lore. Anyone got any more info on it? I’m trying to picture what critical system built on RISC OS would have required ongoing maintenance and am coming up blank.
Strictly speaking, I don't think this is true - virtual memory and process-based memory protection are separate issues. One could have a single-address-space OS where physical memory is identically mapped in each process' address space, while still preserving memory protection. A privileged process in such an OS might effectively be exempt from memory protection altogether, which would provide compatibility for legacy apps.
This isn’t true. There are many modern features missing from RISC OS but memory protection isn’t one of them.
Each process sees its memory at the same logical address, it doesn’t have any way of accessing other process’ memory.
The process’ memory starts at the address 0x8000. http://www.riscos.com/support/developers/riscos6/memory/logi...
Thanks to Castle's mysterious one big customer it has survived into its fourth decade. I’d previously missed this piece of lore. Anyone got any more info on it? I’m trying to picture what critical system built on RISC OS would have required ongoing maintenance and am coming up blank.
Thanks to Castle's mysterious one big customer it has survived into its fourth decade. I’d previously missed this piece of lore. Anyone got any more info on it? I’m trying to picture what critical system built on RISC OS would have required ongoing maintenance and am coming up blank.
Whenever I see RISC OS I always assume it's something for RISC V. I know this is not about that actually, just makes me think about it. But obviously it's for original RISC i.e. ARM. But anyway I still wonder if something like RISC OS could work on RISC V. I saw a youtube demo of someone running RISC OS on Raspberry Pi and it was very snappy. Something older like that has had less time to acquire features (that can s…
> But obviously it's for original RISC i.e. ARM. Not sure if you actually mean that, but to me it sounds like you're implying that ARM is the "original RISC". The first RISC processor was called RISC-I and came out of Berkeley research in 1981. Around the same time came out the MIPS cpu, from Standford university, by a group who shortly after founded a company that by 1985 commercialized the first RISC CPU, the R2000…
Whenever I see RISC OS I always assume it's something for RISC V. I know this is not about that actually, just makes me think about it. But obviously it's for original RISC i.e. ARM. But anyway I still wonder if something like RISC OS could work on RISC V. I saw a youtube demo of someone running RISC OS on Raspberry Pi and it was very snappy. Something older like that has had less time to acquire features (that can s…
> But obviously it's for original RISC i.e. ARM. Not sure if you actually mean that, but to me it sounds like you're implying that ARM is the "original RISC". The first RISC processor was called RISC-I and came out of Berkeley research in 1981. Around the same time came out the MIPS cpu, from Standford university, by a group who shortly after founded a company that by 1985 commercialized the first RISC CPU, the R2000…
So good job on that correction but it doesn't seem necessary to downvote me. I thought I had some interesting comments about the future of operating systems on RISC.
RISC OS is written mostly in ARM assembly, but it's a pretty complete (if dated) OS. I think it would be interesting to convert the sources to LLVM-IR and then abstract the hardware specific parts giving you a cross platform version of RISC-OS. Yeah, it'd be a lot of work ... but I think it'd be very cool. Why? 25 years ago there were dozens of OS's: AIX, Ultrix/OSF-1/Tru64, HP/UX, DG/UX, SCO (yuck), MS-DOS, Dynix/PT…