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Nvidia Ampere GA102 GPU Architecture [pdf]

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Re: Nvidia Ampere GA102 GPU Architecture [pdf]

#2
These GPU architectures are too complicated for my taste. It reminds me of the days of segmented memory, and makes me feel like having to jump through hoops all the time. I'm curious if people have tried to invent something more elegant, and where these approaches have failed.

Also, the fact that NVidia has probably patented this particular architecture makes it less interesting for me to really dig into.

Re: Nvidia Ampere GA102 GPU Architecture [pdf]

#3
post #2

These GPU architectures are too complicated for my taste. It reminds me of the days of segmented memory, and makes me feel like having to jump through hoops all the time. I'm curious if people have tried to invent something more elegant, and where these approaches have failed. Also, the fact that NVidia has probably patented this particular architecture makes it less interesting for me to really dig into.

When you run up against the limits of Moore's law and the end of Dennard Scaling you have to get dirty and do what it takes to get more performance.

Personally, I think CPU architecture became too complicated for my taste after the 68k. So what?

Re: Nvidia Ampere GA102 GPU Architecture [pdf]

#4
post #2

These GPU architectures are too complicated for my taste. It reminds me of the days of segmented memory, and makes me feel like having to jump through hoops all the time. I'm curious if people have tried to invent something more elegant, and where these approaches have failed. Also, the fact that NVidia has probably patented this particular architecture makes it less interesting for me to really dig into.

There is roughly equal levels of complexity in any modern, high performance, general purpose/programmable chip.

Re: Nvidia Ampere GA102 GPU Architecture [pdf]

#5
I posted this a day or two ago:

The A100 whitepaper "spoiled" a lot of these factoids already. (https://www.nvidia.com/content/dam/en-zz/Solutions/Data-Cent...) The new bit seems to be the doubling of FP32 "CUDA cores" (I really hate that word: when Intel or AMD double their CPU pipelines it doesn't mean that they're selling more cores, it means their cores got wider... anyway). A100 didn't have this feature (I assume A100 was 16 Floating point + 16 Integer "Cuda cores" per CU like Turing. Correct me if I'm wrong)

You don't need to read the whitepaper to understand that NVidia has really improved performance/cost here. The 3rd party benchmarks are out and the improved performance is well documented at this point.

The FP32 doubling, is one of the most important bits here. But fortunately for programmers, this doesn't really change how you do your code. The compiler / PTX assembler will schedule your code at compile time to best take advantage of that.

The other bit: larger L1 / Shared memory of 128kB per CU, does affect programmers. GPU programmers have tight control over shared memory, and is very useful for optimization purposes.

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GDDR6's improved memory bandwidth is also big. "Feeding the beast" with faster RAM is always a laudable goal, and sending 2-bits per pin per clock cycle through PAM4 is a nifty trick.

Sparse Tensor Cores were already implemented in A100, and don't seem to be new. If you haven't heard of the tech before, its cool: basically hardware accelerated sparse-matrix computations. A 4x4xFP16 matrix uses 32 bytes under normal conditions, but can be "compressed" into 16 bytes if half-or-more of its values are 0. NVidia Ampere supports hardware-accelerated matrix multiplications of these 16-byte "virtual" 4x4xFP16 matrixes.

I swear that RTX I/O existed before in some other form. This isn't the first time I heard about offloading PCIe to the GPU. Its niche and I don't expect video games to use it (are M.2 SSDs popular enough to be assumed on the PC / Laptop market yet?). But CUDA-coders probably can control their hardware more carefully and benefit from such a feature

Re: Nvidia Ampere GA102 GPU Architecture [pdf]

#6
post #2

These GPU architectures are too complicated for my taste. It reminds me of the days of segmented memory, and makes me feel like having to jump through hoops all the time. I'm curious if people have tried to invent something more elegant, and where these approaches have failed. Also, the fact that NVidia has probably patented this particular architecture makes it less interesting for me to really dig into.

It's a good question actually. Intel tried to make a GPU called Larrabee that was mostly a bunch of small x86 cores with giant vector units. Turns out that it couldn't compete in rendering performance on existing games (in 2010) without the fixed function units that GPUs have, so they canceled it as a GPU. It did result in the AVX-512 instruction set though.

I think the idea still has promise but there's a chicken and egg issue where you'd really need to rearchitect game engines and content pipelines to take full advantage of the flexibility before you'd see a benefit. It's possible that it would work better today, and it's also possible that Intel just gave up too early. In some cases we're already seeing people bypassing the fixed function rasterizer in GPUs and doing rasterization manually in compute shaders [1] [2].

[1] Doom Eternal: http://advances.realtimerendering.com/s2020/RenderingDoomEte...

[2] Epic Nanite: https://twitter.com/briankaris/status/1261098487279579136

Re: Nvidia Ampere GA102 GPU Architecture [pdf]

#7
post #2

These GPU architectures are too complicated for my taste. It reminds me of the days of segmented memory, and makes me feel like having to jump through hoops all the time. I'm curious if people have tried to invent something more elegant, and where these approaches have failed. Also, the fact that NVidia has probably patented this particular architecture makes it less interesting for me to really dig into.

[deleted]

Re: Nvidia Ampere GA102 GPU Architecture [pdf]

#8
post #6
post #2

These GPU architectures are too complicated for my taste. It reminds me of the days of segmented memory, and makes me feel like having to jump through hoops all the time. I'm curious if people have tried to invent something more elegant, and where these approaches have failed. Also, the fact that NVidia has probably patented this particular architecture makes it less interesting for me to really dig into.

It's a good question actually. Intel tried to make a GPU called Larrabee that was mostly a bunch of small x86 cores with giant vector units. Turns out that it couldn't compete in rendering performance on existing games (in 2010) without the fixed function units that GPUs have, so they canceled it as a GPU. It did result in the AVX-512 instruction set though. I think the idea still has promise but there's a chicken an…

Fujitsu's A64FX ARM is proof that 512 bit SIMD can work on a CPU based platform.

Re: Nvidia Ampere GA102 GPU Architecture [pdf]

#9

I posted this a day or two ago: The A100 whitepaper "spoiled" a lot of these factoids already. ( https://www.nvidia.com/content/dam/en-zz/Solutions/Data-Cent ...) The new bit seems to be the doubling of FP32 "CUDA cores" (I really hate that word: when Intel or AMD double their CPU pipelines it doesn't mean that they're selling more cores, it means their cores got wider... anyway). A100 didn't have this feature (I ass…

Everyone i know that plays games on a pc uses either sata m2 or nvme (most use the latter)

Re: Nvidia Ampere GA102 GPU Architecture [pdf]

#10
post #6

Earlier quoted context omitted.

It's a good question actually. Intel tried to make a GPU called Larrabee that was mostly a bunch of small x86 cores with giant vector units. Turns out that it couldn't compete in rendering performance on existing games (in 2010) without the fixed function units that GPUs have, so they canceled it as a GPU. It did result in the AVX-512 instruction set though. I think the idea still has promise but there's a chicken an…

Fujitsu's A64FX ARM is proof that 512 bit SIMD can work on a CPU based platform.

Sure, but the question is can it render graphics competitively with traditional GPUs.
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