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Open source process design kit for usage with SkyWater Foundry's 130nm node

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Re: Open source process design kit for usage with SkyWater Foundry's 130nm node

#11

Seems they are located in a former Cypress plant, under the Minneapolis–Saint Paul International Airport, next to the Mall of America. I don't know why, but had them bookmarked already: [1] https://www.skywatertechnology.com/ I'm a little puzzled by it being on googles github. Anyways, can't hurt, can it? edit: Though 130nm sounds boring, this offering seems to aim to support many interesting and very modern features…

130nm is nothing to shake a stick at. It may not be able to run Crysis but it should be able to run modern linux and a modern web browser.

Re: Open source process design kit for usage with SkyWater Foundry's 130nm node

#13

This is a watershed moment. An open PDK was the last road block for making open silicon chips. It’s as important as say when Linus introduced an open source kernel with Linux after GNU had bumbling around getting nowhere for years. A PDK is roughly analogous to what an assembler does for code in the code => compiler => assembler => machine code tool chain. Previously there were open silicon compilers but not open sil…

> An open PDK was the last road block for making open silicon chips.

Not really, a few boutique manufacturers have had MOSIS compatible design decks for quite while.

An open source set of EDA tools is actually the last roadblock.

Especially crucial is design rule checking and parasitic extraction that isn't ... hobbled.

Re: Open source process design kit for usage with SkyWater Foundry's 130nm node

#14
post #11

Seems they are located in a former Cypress plant, under the Minneapolis–Saint Paul International Airport, next to the Mall of America. I don't know why, but had them bookmarked already: [1] https://www.skywatertechnology.com/ I'm a little puzzled by it being on googles github. Anyways, can't hurt, can it? edit: Though 130nm sounds boring, this offering seems to aim to support many interesting and very modern features…

130nm is nothing to shake a stick at. It may not be able to run Crysis but it should be able to run modern linux and a modern web browser.

The first release of Crysis was 2007. 130nm wasn't too outdated then.

Re: Open source process design kit for usage with SkyWater Foundry's 130nm node

#16
post #14
post #11

Earlier quoted context omitted.

130nm is nothing to shake a stick at. It may not be able to run Crysis but it should be able to run modern linux and a modern web browser.

The first release of Crysis was 2007. 130nm wasn't too outdated then.

To be fair Crysis ran terribly on the latest hardware when it was released and is still used as a benchmark.

Re: Open source process design kit for usage with SkyWater Foundry's 130nm node

#17
post #12

Another open PDK for 45nm (and 15nm, hmm): https://www.eda.ncsu.edu/wiki/FreePDK

FreePDK is not a "real" cell library in the sense that the core logic cells it defines are not real ones that can be manufactured/fabricated by any entity. It is a fake kit that can be used to both "estimate" chip area (for your own RTL, for some definition of "estimate") and also used as a starting point if someone wanted to design their own PDK (e.g. VLSI research into new PDKs done by research labs.)

The fact that this PDK will eventually be "production ready" for a real fab and real chips can be printed using it will be a significant step forward.

Re: Open source process design kit for usage with SkyWater Foundry's 130nm node

#18
post #13

This is a watershed moment. An open PDK was the last road block for making open silicon chips. It’s as important as say when Linus introduced an open source kernel with Linux after GNU had bumbling around getting nowhere for years. A PDK is roughly analogous to what an assembler does for code in the code => compiler => assembler => machine code tool chain. Previously there were open silicon compilers but not open sil…

> An open PDK was the last road block for making open silicon chips. Not really, a few boutique manufacturers have had MOSIS compatible design decks for quite while. An open source set of EDA tools is actually the last roadblock. Especially crucial is design rule checking and parasitic extraction that isn't ... hobbled.

> An open source set of EDA tools is actually the last roadblock.

This is not true. As of last year it is possible to design a complete chip with open source EDA tools and has been demonstrated on RISC-V with the Raven platform [1]. Though this was previously true.

There is debate amongst the community if open foundry tools are essential - with rms surprisingly coming down on the side of “no” with many caveats - but to date there has not been a single chip made with an open source design flow and an open source process technology because while previously there were open source EDA tools there previously were not open source PDK’s. Now there are. Hence the watershed moment.

[1] https://youtu.be/r3GLdsSXcxY

Re: Open source process design kit for usage with SkyWater Foundry's 130nm node

#19
I think big dotcoms (google is with Skywater doing this) are only now realising how much they are reliant on the silicon suppliers.

It is in the current age of big M&A waves going through the microelectronics industry, a big dotcom can be "deplatformed" overnight by a major IC supplier going to a competitor.

Re: Open source process design kit for usage with SkyWater Foundry's 130nm node

#20
I’m curious how much it would cost to get something taped out and produced at this node size (Per wafer) from SkyWater. I have seen the groups that do wafer sharing for a low volume runs, which seems like a good idea if you have a couple grand and want your own silicon.

I wonder if this could make it cheap enough to crowd fund custom chips?

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