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Potential organized fraud in ACM/IEEE computer architecture conferences

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Re: Potential organized fraud in ACM/IEEE computer architecture conferences

#201

Earlier quoted context omitted.

> it's just the review process for getting in has always seemed to be easier for people with the right connections What is this insinuation based on? Do you have data on how many papers by "people with the right connections" are rejected, for example?

it's anecdotal. another anecdote, when first trying to raise awareness of the issue, when mentioning it to members of the community I never got the response "wow, how could this happen in computer architecture?" rather the response tended to be "wow, I can't believe it finally got bad enough that a student died"

Because these anecdotes are unsubstantiated, they can come across as sour grapes, which I think damages your good cause of exposing the serious misconduct for which there's actual evidence.

Re: Potential organized fraud in ACM/IEEE computer architecture conferences

#202

Earlier quoted context omitted.

That's a huge bummer. When I was doing research in physics, I found it easy to get published, even without having a PhD - though it didn't hurt, I think, to be working at a university with a group that had already published in that publication before. With that said, my PIs didn't assist me at all in preparing, submitting, or defending my research, except to inform me of what to prepare for. I was really pleased with…

I am thinking about applying again from the beginning and start Ph.D. all over. Since I am in love with science. And the only reason I left my home country was because I wanted pursue science. (Science is what makes my love beautiful) But I am afraid maybe my next supervisor will be same (let alone if I leave middle way my current supervisor will not give me letter of recommendation).

Find a new advisor. Having a body of dishonest work is problematic.

I am a Full Professor. Before we submit a paper, I do my best to make sure our code does what we say it does. We make sure we understand the results as a second check on our implementation. Then we hope we caught all the important bugs that might invalidate our results. Now to be clear, we are not building industrial grade systems and so new benchmarks might expose bugs we don't know about. I am pretty sure that we are not the only group that does this in the field of Programming Languages & Compilers.

Re: Potential organized fraud in ACM/IEEE computer architecture conferences

#203

Earlier quoted context omitted.

> ewers ever saw the code involved. Thi There are a lot of papers in ISCA that are based on cycle-accurate simulators. It has been like that since forever. How else would you evaluate new non-existent architectures that are bleeding-edge? FPGA? Most can't even afford that. Not to mention it's just not possible in a lot of cases. I agree with you that some work should be verifiable but your accusation is weak for this…

> If you don't want cycle-accurate simulator based papers, you'd have to eliminate a large variety of body of work only possible with this approach. yes. Most "cycle-accurate" results are garbage. Do you show error bars on your results? Can you? Did you run on a variety of independently implemented simulators and show the results on all of them? Did you run the full reference inputs to SPEC all the way through? Why n…

omg running ref spec on gem5 fs mode...
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