VexRiscv is a quadcore, Linux-capable RISC-V softcore for FPGA • Hacker News Board

Re: VexRiscv is a quadcore, Linux-capable RISC-V softcore for FPGA

#11

Post by ladberg » Thu, May 21, 2020, 9:37 PM UTC

lifeisstillgood wrote: post #8

How far down the road of something like nand2tetris can I take a FPGA ? Can I design my own system in verilog and flash it to a FPGA like this and effectively run on my own computer?

Yep, that's the point of FPGAs. The easiest way to see is to synthesize it in an FPGA tool (e.g. Vivado) which you can probably do for free. Different FPGAs have different hardware resources, but for any small designs you can probably fit them on a cheap FPGA.

Re: VexRiscv is a quadcore, Linux-capable RISC-V softcore for FPGA

#12

Post by rkagerer » Thu, May 21, 2020, 9:37 PM UTC

I'm disappointed today's general purpose CPU's and microcontrollers don't come with some integrated FPGA space, similar to how you have SRAM and other peripherals. Intel talked about it a few years back [1] but I'm not sure anything materialized.

The closest I've seen in popular chips is a few gates worth of programmable logic. Are there any hidden gems I've missed out on?

[1] https://www.nextplatform.com/2018/05/24/a-peek-inside-that-i...

Re: VexRiscv is a quadcore, Linux-capable RISC-V softcore for FPGA

#13

Post by tverbeure » Thu, May 21, 2020, 9:38 PM UTC

One of the most interesting aspects of the VexRiscv is the way it's implemented. The VexRiscv is written with SpinalHDL, a hardware description library in Scala. But that's not the main thing: in additional to Verilog and VHDL, there are other ways to write RTL, from Python to Scala to Haskell.

What's really special is that the VexRiscv is constructed from a large number of plugins that split up the design 'horizontally' per feature instead the traditional 'vertical' way that is pipeline-stage oriented.

It makes it possible to implement all aspects of, say, a new instruction in one file, instead of spreading it over many different files.

I've written about that here: https://tomverbeure.github.io/rtl/2018/12/06/The-VexRiscV-CP....

Re: VexRiscv is a quadcore, Linux-capable RISC-V softcore for FPGA

#14

Post by sneak » Thu, May 21, 2020, 9:40 PM UTC

rkagerer wrote: post #12

I'm disappointed today's general purpose CPU's and microcontrollers don't come with some integrated FPGA space, similar to how you have SRAM and other peripherals. Intel talked about it a few years back [1] but I'm not sure anything materialized. The closest I've seen in popular chips is a few gates worth of programmable logic. Are there any hidden gems I've missed out on? [1] https://www.nextplatform.com/2018/05/24/…

Are there many applications that would benefit from having it on die versus across a few PCIe lanes? AFAIK putting it on a card would still grant it the same full speed DMA it would have being on-die with the CPU.

Re: VexRiscv is a quadcore, Linux-capable RISC-V softcore for FPGA

#15

Post by londons_explore » Thu, May 21, 2020, 9:41 PM UTC

rkagerer wrote: post #12

I'm disappointed today's general purpose CPU's and microcontrollers don't come with some integrated FPGA space, similar to how you have SRAM and other peripherals. Intel talked about it a few years back [1] but I'm not sure anything materialized. The closest I've seen in popular chips is a few gates worth of programmable logic. Are there any hidden gems I've missed out on? [1] https://www.nextplatform.com/2018/05/24/…

With the transition of compute from performance focussed to performance per watt focussed (due to cooling usually being the limiting factor), the niche for the FPGA has almost vanished.

There are very very very few compute tasks where an FPGA solves a problem with better performance per watt than both a CPU and a GPU.

I would bet that emulating a RISC-V program on x64 is far more power efficient than running a RISC-V core on an FPGA for example.

Re: VexRiscv is a quadcore, Linux-capable RISC-V softcore for FPGA

#16

Post by eebynight » Thu, May 21, 2020, 9:42 PM UTC

The fact that it fits in the 35T version with room to spare is pretty huge, especially since certain packages of the 35T start as low as $35 for a single chip, no MOQ.

I could see myself dropping one of these on a homemade project if I ever spend the time making a reliable reflow oven...

Re: VexRiscv is a quadcore, Linux-capable RISC-V softcore for FPGA

#17

Post by monocasa » Thu, May 21, 2020, 9:46 PM UTC

londons_explore wrote: post #15

rkagerer wrote: post #12

I'm disappointed today's general purpose CPU's and microcontrollers don't come with some integrated FPGA space, similar to how you have SRAM and other peripherals. Intel talked about it a few years back [1] but I'm not sure anything materialized. The closest I've seen in popular chips is a few gates worth of programmable logic. Are there any hidden gems I've missed out on? [1] https://www.nextplatform.com/2018/05/24/…

With the transition of compute from performance focussed to performance per watt focussed (due to cooling usually being the limiting factor), the niche for the FPGA has almost vanished. There are very very very few compute tasks where an FPGA solves a problem with better performance per watt than both a CPU and a GPU. I would bet that emulating a RISC-V program on x64 is far more power efficient than running a RISC-V…

There's a lot of use cases today where perf per watt doesn't matter.

Re: VexRiscv is a quadcore, Linux-capable RISC-V softcore for FPGA

#18

Post by wmf » Thu, May 21, 2020, 9:47 PM UTC

sneak wrote: post #14

rkagerer wrote: post #12

I'm disappointed today's general purpose CPU's and microcontrollers don't come with some integrated FPGA space, similar to how you have SRAM and other peripherals. Intel talked about it a few years back [1] but I'm not sure anything materialized. The closest I've seen in popular chips is a few gates worth of programmable logic. Are there any hidden gems I've missed out on? [1] https://www.nextplatform.com/2018/05/24/…

Are there many applications that would benefit from having it on die versus across a few PCIe lanes? AFAIK putting it on a card would still grant it the same full speed DMA it would have being on-die with the CPU.

The benefit from putting it on-die is not speed but economy of scale.

Re: VexRiscv is a quadcore, Linux-capable RISC-V softcore for FPGA

#19

Post by opencl » Thu, May 21, 2020, 9:52 PM UTC

rkagerer wrote: post #12

I'm disappointed today's general purpose CPU's and microcontrollers don't come with some integrated FPGA space, similar to how you have SRAM and other peripherals. Intel talked about it a few years back [1] but I'm not sure anything materialized. The closest I've seen in popular chips is a few gates worth of programmable logic. Are there any hidden gems I've missed out on? [1] https://www.nextplatform.com/2018/05/24/…

Not in the desktop/server space but there are a few products like this. Xilinx has the Zynq line with 1-2 Cortex-A9 cores paired to an FPGA. Microsemi has their Cortex-M3 based Smartfusion line and is supposedly launching their Polarfire SoC with 4 RISC-V cores plus an FPGA later this year.

Re: VexRiscv is a quadcore, Linux-capable RISC-V softcore for FPGA

#20

Post by magicalhippo » Thu, May 21, 2020, 10:01 PM UTC

rkagerer wrote: post #12

I'm disappointed today's general purpose CPU's and microcontrollers don't come with some integrated FPGA space, similar to how you have SRAM and other peripherals. Intel talked about it a few years back [1] but I'm not sure anything materialized. The closest I've seen in popular chips is a few gates worth of programmable logic. Are there any hidden gems I've missed out on? [1] https://www.nextplatform.com/2018/05/24/…

Well Xilinx has the Zynq-7000 SoC[1], featuring an ARM Cortex-A9 CPU along with a potentially quite large FPGA.

Not exactly cheap though, at least in small quantities[2]

[1]: https://www.xilinx.com/products/silicon-devices/soc/zynq-700...

[2]: https://www.digikey.com/products/en/integrated-circuits-ics/...