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Programming a 144-computer Chip to Minimize Power (2013)

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Re: Programming a 144-computer Chip to Minimize Power (2013)

#21

Post by tachyonbeam »

kleer001 wrote: post #20
tachyonbeam wrote: post #14

I saw this talk live at Strange Loop 2013, and I'm going to be a contrarian: I wasn't impressed. I don't mean to bash Chuck Moore. Forth is cool, and this chip looks neat, but my impression is that this is a solution looking for a problem. Chuck Moore is having a lot of fun working on it, but he fails to convey why this is useful. The impression that I had is that the whole talk was Chuck Moore going "look at all the…

> this is a solution looking for a problem Sounds like a bit of art to enjoy for its self.

And there's nothing wrong with that. I think programming is fun, and hardware design can be too. However, if you're a company trying to sell a product based on some specific claims, you probably should do more to convince potential users.

Re: Programming a 144-computer Chip to Minimize Power (2013)

#22

Post by kick »

tachyonbeam wrote: post #14

I saw this talk live at Strange Loop 2013, and I'm going to be a contrarian: I wasn't impressed. I don't mean to bash Chuck Moore. Forth is cool, and this chip looks neat, but my impression is that this is a solution looking for a problem. Chuck Moore is having a lot of fun working on it, but he fails to convey why this is useful. The impression that I had is that the whole talk was Chuck Moore going "look at all the…

They're making their second-generation chip right now, and I think there are a bunch of problems that this chip is an obvious solution for.

Chuck Moore is bad at presentations to outside audiences. This should surprise no one familiar with the man. This doesn't make the tech less useful, though.

Re: Programming a 144-computer Chip to Minimize Power (2013)

#23

Post by 7thaccount »

kick wrote: post #22
tachyonbeam wrote: post #14

I saw this talk live at Strange Loop 2013, and I'm going to be a contrarian: I wasn't impressed. I don't mean to bash Chuck Moore. Forth is cool, and this chip looks neat, but my impression is that this is a solution looking for a problem. Chuck Moore is having a lot of fun working on it, but he fails to convey why this is useful. The impression that I had is that the whole talk was Chuck Moore going "look at all the…

They're making their second-generation chip right now, and I think there are a bunch of problems that this chip is an obvious solution for. Chuck Moore is bad at presentations to outside audiences. This should surprise no one familiar with the man. This doesn't make the tech less useful, though.

Which problems for those of us who don't find it obvious? I'm a big fan of Chuck and Forth in general, but I don't do any embedded work since college, so I don't have much personal use for this kind of system that I can think of.

Re: Programming a 144-computer Chip to Minimize Power (2013)

#24

Post by adwn »

kick wrote: post #22
tachyonbeam wrote: post #14

I saw this talk live at Strange Loop 2013, and I'm going to be a contrarian: I wasn't impressed. I don't mean to bash Chuck Moore. Forth is cool, and this chip looks neat, but my impression is that this is a solution looking for a problem. Chuck Moore is having a lot of fun working on it, but he fails to convey why this is useful. The impression that I had is that the whole talk was Chuck Moore going "look at all the…

They're making their second-generation chip right now, and I think there are a bunch of problems that this chip is an obvious solution for. Chuck Moore is bad at presentations to outside audiences. This should surprise no one familiar with the man. This doesn't make the tech less useful, though.

> [...] I think there are a bunch of problems that this chip is an obvious solution for

If those were really obvious, tachyonbeam wouldn't have to ask ;-)

In your opinion, what are problems for which this chip would be a solution?

Re: Programming a 144-computer Chip to Minimize Power (2013)

#25

Post by Koshkin »

tachyonbeam wrote: post #21
kleer001 wrote: post #20

Earlier quoted context omitted.

> this is a solution looking for a problem Sounds like a bit of art to enjoy for its self.

And there's nothing wrong with that. I think programming is fun, and hardware design can be too. However, if you're a company trying to sell a product based on some specific claims, you probably should do more to convince potential users.

> should do more

When possible, sure; otherwise, selling stuff could be fun, too.

Re: Programming a 144-computer Chip to Minimize Power (2013)

#26

Post by richard_shelton »

mastax wrote: post #10

Reminds me a lot of the Parallax Propeller: many simple cores optimized for bit-banging I/O and programmable logic. Of course this is much lower power and has many more cores. I think that many core architectures can actually be simpler to program in an embedded context than the traditional single core systems. It's akin to a hardware implementation of the actor model rather than an interrupt state machine or interru…

The chip is closer to AsAP [1] and XMOS xCore [2]. I remember that these two chips-competitors already existed when I was programming the predecessor of Greenarrays GA144. By the way, it was very fun to program these Forth-based processor arrays!

[1] https://en.wikipedia.org/wiki/Asynchronous_array_of_simple_p...

[2] https://en.wikipedia.org/wiki/XMOS

Re: Programming a 144-computer Chip to Minimize Power (2013)

#27

Post by duskwuff »

fortran77 wrote: post #17
mastax wrote: post #10

Reminds me a lot of the Parallax Propeller: many simple cores optimized for bit-banging I/O and programmable logic. Of course this is much lower power and has many more cores. I think that many core architectures can actually be simpler to program in an embedded context than the traditional single core systems. It's akin to a hardware implementation of the actor model rather than an interrupt state machine or interru…

The DEFCON 22 badge was done on a Propeller. I did a little pokeing around on it--very interesting architecture. But they don't all run at once.... It's just a way to switch contexts instantly.

They do all run at once. All eight "cogs" exist as discrete hardware within the chip, and can perform operations on their cog RAM and I/Os simultaneously.

What doesn't happen all at once is access to main RAM. That's handled by a round-robin arbiter.

Re: Programming a 144-computer Chip to Minimize Power (2013)

#28

Post by mrighele »

The grid layout and having chip(let?)s communicating with the four neighbors reminds me a lot of TIS-100 [1], I'm wondering if the game was inspired by this chip.

Hopefully the real chip is easier to program :-).

[1] https://store.steampowered.com/app/370360/TIS100/

Re: Programming a 144-computer Chip to Minimize Power (2013)

#30

Post by petermcneeley »

tachyonbeam wrote: post #14

I saw this talk live at Strange Loop 2013, and I'm going to be a contrarian: I wasn't impressed. I don't mean to bash Chuck Moore. Forth is cool, and this chip looks neat, but my impression is that this is a solution looking for a problem. Chuck Moore is having a lot of fun working on it, but he fails to convey why this is useful. The impression that I had is that the whole talk was Chuck Moore going "look at all the…

4mW running at 666 Mips. So is that 40W for 6.66 Tips ? If true then the perf/power is pretty decent. I could easily turn this in to a GPU.
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