Reviewing Bad Schematics as EE Interview Tactic • Hacker News Board

Re: Reviewing Bad Schematics as EE Interview Tactic

#11

Post by crtlaltdel » Mon, Dec 23, 2019, 10:13 PM UTC

rightbyte wrote: post #3

userbinator wrote: post #2

My example of this: I have yet to meet a junior EE candidate who understands the need for decoupling capacitors in digital circuits That says a lot about the state of education. I'm not even officially an EE, and only did some embedded hardware stuff and some electronics as a hobby, yet I know what that's about.

It seems strange that the author has not met a single one that understands that concept since it is quite basic. I am guessing he just is bad at interviewing and asks trick questions till he meet someone who know the interviewing game inside out. Examples he gives: "Current limiting resistors missing (BJTs, diodes, etc.) Shorting a potentiometer node to a rail Voltage regulators missing capacitors at input/output Mis…

I think it makes sense depending on the nature of the role in question.

If the role's primary function is to do validation prior to manufacture this seems like reasonable. it assumes that new circuits will have some number of fairly common mistakes. in my experience this is very true, despite the skill of the engineer who designed the circuit. missing termination, pullup/downs missing, etc. if the role is applications engineering...well...its far less likely you would be troubleshooting common circuit design issues so much as you would be troubleshooting common system design issues. im sure you can extend this to other functional roles an EE may take on. if the job is to design a MCC and size breakers to minimize arc flash hazards i doubt the applicant will be up on a correctly build half-bridge rectifier.

in that list quoted i've encountered all of it in new designs, including missing stuff plainly stated in the part's application notes (like those regulator caps).

Re: Reviewing Bad Schematics as EE Interview Tactic

#12

Post by Sanzig » Mon, Dec 23, 2019, 10:17 PM UTC

userbinator wrote: post #2

My example of this: I have yet to meet a junior EE candidate who understands the need for decoupling capacitors in digital circuits That says a lot about the state of education. I'm not even officially an EE, and only did some embedded hardware stuff and some electronics as a hobby, yet I know what that's about.

I'm an EE. My first job out of university had a pretty good whiteboard interview (I know - we're not supposed to say good things about whiteboard interviews on HN). I thought the process was pretty straightforward. The first exchange went something like this:

Interviewer: "Can you draw me the schematic symbol for an LED?"

Me: Draws LED schematic symbol.

Interviewer: "What would you say the forward voltage is on that LED?"

Me: "That depends - maybe between 1 and 4 volts depending on the color?"

Interviewer: "Good, let's call it two volts. What would you say would be a reasonable current if we're just using it as a power indicator?"

Me: "I usually set it to around one milliamp on my boards."

Interviewer: "That sounds good. Can you show me how you would connect that to a 5 V supply?"

Me: Calculates ballast resistor size for 1 mA current from a 5 V supply with a 2 V LED drop, then draws a circuit with an LED, resistor, and 5 V source.

---

And on it went. We ramped up through complexity: next we did simple BJT and FET switches, then basic op-amp circuits including single-pole filters. I stumbled on a differential BJT amplifier question, but the interviewer helped me through it. And so on. I didn't nail everything, but I got most things right. I ended up getting the job.

When I asked the interviewer later about his experiences using test for hiring, he told me a sizeable chunk of new graduates flunked out on the first question, which I found pretty shocking. A lot of students with excellent resumes didn't even know how to hook up an LED!

As to the cause - it's just a guess, but I think many "good students" these days are very good at regurgitating information and memorizing procedures to complete formulaic exam problems, but aren't very good at actually developing the physical understanding of what's really going on. When I was in my senior year, I designed a buck converter as a small part of my capstone project. One of my team members remarked that he didn't realize a buck converter was a power supply, and that he had seen it in his power electronics class but had no idea what it was used for. He could do the duty cycle calculations for one all day long, but he didn't even realize it was a DC/DC power supply!

Universities these days do not seem to successfully evaluate deep understanding. Rather, they seem to optimize for the superficial appearance of understanding. Even "lab courses" when I was a student were formulaic: plug this wire in here, put your probe here, read this value here, do this calculation here for your report. There were very few courses that were actually designed to encourage real experimentation and practical learning. A good EE needs to develop a mental model of the underlying physics and be able to relate it to practice, and that is a tricky thing to teach in the classroom.

Anyway, all that said - I really like the idea of the "bad schematics" approach for an interview question. If I ever find myself in a hiring role, I am 100% using it.

Re: Reviewing Bad Schematics as EE Interview Tactic

#13

Post by rightbyte » Mon, Dec 23, 2019, 10:29 PM UTC

userbinator wrote: post #6

rightbyte wrote: post #3

Earlier quoted context omitted.

It seems strange that the author has not met a single one that understands that concept since it is quite basic. I am guessing he just is bad at interviewing and asks trick questions till he meet someone who know the interviewing game inside out. Examples he gives: "Current limiting resistors missing (BJTs, diodes, etc.) Shorting a potentiometer node to a rail Voltage regulators missing capacitors at input/output Mis…

how should you know that the voltage regulator doesn't have internal caps without seeing the specs? Can you name one voltage regulator that has them? Maybe you've worked with a few, but just off the top of my head, the 78xx, 317, and 1117 don't, and neither do all the other miscellaneous ones that I've seen in consumer electronics.

Traco Power has some. I don't know which one we used on the top of my head but kinda like this with fewer pins: https://www.tracopower.com/products/browse-by-category/find/...

It's not my field and I had little clue what was happening at the EE level. Maybe you could argue they are not what is normally meant by saying voltage regulators.

Re: Reviewing Bad Schematics as EE Interview Tactic

#14

Post by SilasX » Mon, Dec 23, 2019, 10:30 PM UTC

rightbyte wrote: post #3

userbinator wrote: post #2

My example of this: I have yet to meet a junior EE candidate who understands the need for decoupling capacitors in digital circuits That says a lot about the state of education. I'm not even officially an EE, and only did some embedded hardware stuff and some electronics as a hobby, yet I know what that's about.

It seems strange that the author has not met a single one that understands that concept since it is quite basic. I am guessing he just is bad at interviewing and asks trick questions till he meet someone who know the interviewing game inside out. Examples he gives: "Current limiting resistors missing (BJTs, diodes, etc.) Shorting a potentiometer node to a rail Voltage regulators missing capacitors at input/output Mis…

>It seems strange that the author has not met a single one that understands that concept since it is quite basic.

That's exactly what everyone says when candidates fail FizzBuzz.

The best explanation I know is that good candidates get hired quickly, so at any given moment, the candidate pool is dominated by people who keep failing questions like this.

Re: Reviewing Bad Schematics as EE Interview Tactic

#15

Post by rightbyte » Mon, Dec 23, 2019, 10:33 PM UTC

spatular wrote: post #7

rightbyte wrote: post #3

Earlier quoted context omitted.

It seems strange that the author has not met a single one that understands that concept since it is quite basic. I am guessing he just is bad at interviewing and asks trick questions till he meet someone who know the interviewing game inside out. Examples he gives: "Current limiting resistors missing (BJTs, diodes, etc.) Shorting a potentiometer node to a rail Voltage regulators missing capacitors at input/output Mis…

I've yet to see a voltage regulator IC with built-in caps. DC-DC modules sure, but author argues that this kind of info (module / ic) should be present in schematics. BTW, some linear regulators can't handle ceramic and low-ESR capacitors at output, and may be better with none if that's the choise.

I hate to maybe be proving his point by showing that I'm not into the EE field and thinking of a board mounted DCDC-converter as a voltage regulator (which it is but not what you usually call it in english?)

I would still argue that logic IC have alot of internal pull ups. Or that eg. "Reset sequence of digital component is wrong" is a bad whiteboard question.

Re: Reviewing Bad Schematics as EE Interview Tactic

#16

Post by artemonster » Mon, Dec 23, 2019, 10:34 PM UTC

Sanzig wrote: post #12

userbinator wrote: post #2

My example of this: I have yet to meet a junior EE candidate who understands the need for decoupling capacitors in digital circuits That says a lot about the state of education. I'm not even officially an EE, and only did some embedded hardware stuff and some electronics as a hobby, yet I know what that's about.

I'm an EE. My first job out of university had a pretty good whiteboard interview (I know - we're not supposed to say good things about whiteboard interviews on HN). I thought the process was pretty straightforward. The first exchange went something like this: Interviewer: "Can you draw me the schematic symbol for an LED?" Me: Draws LED schematic symbol. Interviewer: "What would you say the forward voltage is on that…

"Universities these days do not seem to successfully evaluate deep understanding" If you (as Uni) try and do that, you'd immediately find your quota of those who have finished a degree to plummet.

At our university we had basically only TWO courses that required you to "understand" to pass them and not just mindlessly puke out formulas and insert values. These were theoretical electrodynamics and integrated analog circuits. These were exactly the exams that kicked people out of university, since you had only 3 attempts to pass them.

So, no, uni's will never try to force understanding, since so few are actually capable of that. Unis teach you to know the basic set of symbols, be a mindless symbol manipulating monkey and hope that industry would pick you up and enlighten you afterwards.

Re: Reviewing Bad Schematics as EE Interview Tactic

#17

Post by userbinator » Mon, Dec 23, 2019, 10:38 PM UTC

Sanzig wrote: post #12

userbinator wrote: post #2

My example of this: I have yet to meet a junior EE candidate who understands the need for decoupling capacitors in digital circuits That says a lot about the state of education. I'm not even officially an EE, and only did some embedded hardware stuff and some electronics as a hobby, yet I know what that's about.

I'm an EE. My first job out of university had a pretty good whiteboard interview (I know - we're not supposed to say good things about whiteboard interviews on HN). I thought the process was pretty straightforward. The first exchange went something like this: Interviewer: "Can you draw me the schematic symbol for an LED?" Me: Draws LED schematic symbol. Interviewer: "What would you say the forward voltage is on that…

The closest standard value for that resistor would be a 3k3, if I'm not mistaken...

In the software industry we have a similar problem; alot of people can follow instructions on how to glue together lots of libraries and frameworks, but have no idea how to go beyond that --- or understanding of how computers work in general --- much less debug it when something goes wrong. There's a classic article about this:

https://blog.codinghorror.com/why-cant-programmers-program/

Re: Reviewing Bad Schematics as EE Interview Tactic

#18

Post by rightbyte » Mon, Dec 23, 2019, 10:44 PM UTC

SilasX wrote: post #14

rightbyte wrote: post #3

Earlier quoted context omitted.

It seems strange that the author has not met a single one that understands that concept since it is quite basic. I am guessing he just is bad at interviewing and asks trick questions till he meet someone who know the interviewing game inside out. Examples he gives: "Current limiting resistors missing (BJTs, diodes, etc.) Shorting a potentiometer node to a rail Voltage regulators missing capacitors at input/output Mis…

>It seems strange that the author has not met a single one that understands that concept since it is quite basic. That's exactly what everyone says when candidates fail FizzBuzz. The best explanation I know is that good candidates get hired quickly, so at any given moment, the candidate pool is dominated by people who keep failing questions like this.

He is saying that all juniors fail EE-FizzBuzz, which makes me question his interviewing skills.

Re: Reviewing Bad Schematics as EE Interview Tactic

#19

Post by jdsully » Mon, Dec 23, 2019, 10:46 PM UTC

rightbyte wrote: post #3

userbinator wrote: post #2

My example of this: I have yet to meet a junior EE candidate who understands the need for decoupling capacitors in digital circuits That says a lot about the state of education. I'm not even officially an EE, and only did some embedded hardware stuff and some electronics as a hobby, yet I know what that's about.

It seems strange that the author has not met a single one that understands that concept since it is quite basic. I am guessing he just is bad at interviewing and asks trick questions till he meet someone who know the interviewing game inside out. Examples he gives: "Current limiting resistors missing (BJTs, diodes, etc.) Shorting a potentiometer node to a rail Voltage regulators missing capacitors at input/output Mis…

Decoupling capacitors need to be within a few mm of the integrated circuit consuming the power. It really doesn't matter if the voltage regulator has them or not.

This is different than for bulk capacitors, but even those should still be on the same PCB assembly because connectors have higher resistance and this will limit their ability to handle transient surges.

Re: Reviewing Bad Schematics as EE Interview Tactic

#20

Post by spatular » Mon, Dec 23, 2019, 10:46 PM UTC

rightbyte wrote: post #15

spatular wrote: post #7

Earlier quoted context omitted.

I've yet to see a voltage regulator IC with built-in caps. DC-DC modules sure, but author argues that this kind of info (module / ic) should be present in schematics. BTW, some linear regulators can't handle ceramic and low-ESR capacitors at output, and may be better with none if that's the choise.

I hate to maybe be proving his point by showing that I'm not into the EE field and thinking of a board mounted DCDC-converter as a voltage regulator (which it is but not what you usually call it in english?) I would still argue that logic IC have alot of internal pull ups. Or that eg. "Reset sequence of digital component is wrong" is a bad whiteboard question.

I believe that without qualification "linear regulator" could be just anything that regulate voltage. Usually you can easily tell from schematics around it if it's some switching IC, an LDO or a module. And if you have layout or 3d render of the board it'd be almost certain.

Otherwise the person may just ask: "where are caps, or is this thing a module or what?"