Destroying x86_64 instruction decoders with differential fuzzing

Post by kjs3 » Tue, Nov 12, 2019, 2:47 AM UTC

snvzz wrote: post #97

tropo wrote: post #93

Earlier quoted context omitted.

The 68000 has some serious design flaws in the architecture. A notable one is the autoincrement and autodecrement of indirect memory references. This makes it difficult to get the architecture running instructions in parallel. Memory can be changing, but the address at which it changes is determined late. It gets even more troublesome if the CPU comes with a MMU. It becomes necessary to avoid actually performing the…

>The 68000 has some serious design flaws in the architecture. So do all CPUs from that era. This is why 68000 was replaced by Motorola itself. It's an abnormality x86 has been dragged this far. >The CPU architecture specifies a small number of levels. 7 is pretty reasonable. They're autovectored, so interrupt latency is low. 68000 was often chosen for realtime applications due to this feature. >Better designs, like x…

Post by kjs3 » Tue, Nov 12, 2019, 2:50 AM UTC

stragies wrote: post #2

From the great article: "x86_64 is the 64-bit extension of a 32-bit extension of a 40-year-old 16-bit ISA designed to be source-compatible with a 50-year-old 8-bit ISA. In short, it’s a mess, with each generation adding and removing functionality, ..." Nice way of wording that! :) It also explains the complexity of the following 10 pages of text.