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Xilinx Vitis and Vitis AI Software Development Platforms

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Re: Xilinx Vitis and Vitis AI Software Development Platforms

#21

Post by tfmkevin »

kop316 wrote: post #6

"The adoption of FPGA technology in the market has always been limited by the severe learning curve required to take advantage of it." I vehemently disagree with this. FGPAs and their toolchains are notoriously expensive and proprietary. I have no doubt that if tool chains were opened up and an average person could program for it, you would see much more.rapid adoption because then an average person could start the l…

The "average person" cannot program for it. I've managed teams as large as 60 extremely competent full-time EDA engineers working for years on only the synthesis portion of the problem. It is FAR more complex than, say, developing a compiler. Both Xilinx and Intel have more engineers developing FPGA software tools than they do developing FPGA hardware. It's a common misconception that just any group of competent software engineers could whip out better FPGA tools if they only had access...

Re: Xilinx Vitis and Vitis AI Software Development Platforms

#22

Post by tfmkevin »

gsmecher wrote: post #2

Note that all of this is predicated on High Level Synthesis (HLS) becoming real, after many years of industry over-promises and under-deliveries. A jaded RTL engineer may fairly ask, "what's different this time?" I'm convinced it's two things: 1. These chips have scaled to the point where the toolflow isn't just annoying, it's crippling. (I say that as an RTL designer who likes Vivado, believe it or not.) Making effe…

HLS is real. I've talked with dozens of teams who have successfully used HLS tools such as Mentor's Catapult, Xilinx's Vivado HLS, and Cadence's Stratus for a wide range of ASIC and FPGA projects. They claim they saw compelling benefits in project schedules, architectural flexibility, and overall performance. However, HLS is still (IMHO) a "power tool" for competent digital designers, not a tool that enables a software designer to create hardware. There is too much hardware-specific expertise required to create good HLS-able code and to do the tradeoffs like pipelining, unrolling, memory architecture, etc etc etc.

Re: Xilinx Vitis and Vitis AI Software Development Platforms

#23

Post by Traster »

rowanG077 wrote: post #8
kop316 wrote: post #6

"The adoption of FPGA technology in the market has always been limited by the severe learning curve required to take advantage of it." I vehemently disagree with this. FGPAs and their toolchains are notoriously expensive and proprietary. I have no doubt that if tool chains were opened up and an average person could program for it, you would see much more.rapid adoption because then an average person could start the l…

This. It's not so hard, any competent software engineer could learn HDLs in one or two weeks. The fucking toolchain though? Months...

Software Engineers can learn HDLs in one or two weeks about as well as hardware engineers can learn C++ in one or two weeks. Will they get to something syntactically correct? Sure. That doesn't mean what they'd be able to write would be useful. And it's not just the toolchain, it's about understanding that HDL isn't a tool for programming FPGAs, it's a tool for programming hardware and FPGAs are one very specific target for which writing performant code requires a high level of knowledge about the underlying structure of the FPGA.

Re: Xilinx Vitis and Vitis AI Software Development Platforms

#24

Post by kevin_thibedeau »

gsmecher wrote: post #7
spamizbad wrote: post #3

Earlier quoted context omitted.

I'm curious: why is FPGA tooling so poor? I used a Spartan-3 over a decade ago for a simple project, and as cursory look it doesn't seem like things have changed much despite the devices becoming significantly more diverse and complicated.

It's not quite fair to say the tooling is flat-out awful. Vivado is much better than ISE. The place/route algorithms matured (analytical placement rather than simulated annealing), and the software it's wrapped in grew up (it's now tcl-driven and much more script- and revision-control-friendly.) Vivado was a heroic effort and Xilinx deserves credit for taking software seriously, and getting so much of it right. If yo…

FWIW the ISE tooling was all command line driven and could be orchestrated from a makefile and controlled by a VCS. You'd lose some of the graphical convenience to monitor issues and reporting but it can be done.

HLS's problem is how to deal with assumptions about memory access and parallelism. You invariably end up coding to the tool to accommodate the limitations of C in this domain.

Re: Xilinx Vitis and Vitis AI Software Development Platforms

#25

Post by tfmkevin »

8note wrote: post #5
rowanG077 wrote: post #4

Earlier quoted context omitted.

Mostly because it's (almost) all proprietary. None of the companies are investing in a truly usable solution. It speaks volumes that a handful of developers working for free where able to create a vastly better experience with yosys and friends.

I've always imagined they have a good quality version for military applications, and the bad stuff for everyone else

There are no separate tools for military use. And, the mil/aero versions of the chips are usually a generation or two behind because of the extra work to make them high-reliability, produce the required documentation, etc.

Re: Xilinx Vitis and Vitis AI Software Development Platforms

#26

Post by aseipp »

jhallenworld wrote: post #9
kop316 wrote: post #6

"The adoption of FPGA technology in the market has always been limited by the severe learning curve required to take advantage of it." I vehemently disagree with this. FGPAs and their toolchains are notoriously expensive and proprietary. I have no doubt that if tool chains were opened up and an average person could program for it, you would see much more.rapid adoption because then an average person could start the l…

I also disagree. The main problem is much simpler: they cost too much for fundamental reasons. The die-size for an FPGA that would have equivalent power of an Intel CPU or Nvidia GPU would be huge and expensive.

What does "equivalent power" even mean? It's completely useless without any qualifiers or specific metrics/goals.

My Nvidia GPU also doesn't run x86 programs at the speed of my desktop, but I never expected it to. It's true in the vacuous sense only.

Re: Xilinx Vitis and Vitis AI Software Development Platforms

#27

Post by jhallenworld »

aseipp wrote: post #26
jhallenworld wrote: post #9

Earlier quoted context omitted.

I also disagree. The main problem is much simpler: they cost too much for fundamental reasons. The die-size for an FPGA that would have equivalent power of an Intel CPU or Nvidia GPU would be huge and expensive.

What does "equivalent power" even mean ? It's completely useless without any qualifiers or specific metrics/goals. My Nvidia GPU also doesn't run x86 programs at the speed of my desktop, but I never expected it to. It's true in the vacuous sense only.

They are all Turing machines, all that matters is can I run my algorithm at higher performance than equivalent priced conventional solutions.

Re: Xilinx Vitis and Vitis AI Software Development Platforms

#28

Post by rowanG077 »

PAGAN_WIZARD wrote: post #19
rowanG077 wrote: post #8

Earlier quoted context omitted.

This. It's not so hard, any competent software engineer could learn HDLs in one or two weeks. The fucking toolchain though? Months...

Ive seen plenty of HDL written by people who are software engineers, it's not good. It seems to me most software engineers struggle with visualizing their behavioral code as a schematic and tend to write code that is not very synthesis friendly and overly convoluted. Not to mention most issues with hardware engineering cant be solved by a google search of how to do X in Verilog/VHDL, problems tend to be device specif…

I have seen some code written by software engineers that was bad and also a lot that was good. They simply need to be taught how HDLs work which is conceptually simpler then something like C++.

I very much disagree that most issues are hardware specific. FPGAs all work the same way. What is different is the IP that can be ran on different FPGAs but that is generally a tooling problem not inherent to the problem domain.

Re: Xilinx Vitis and Vitis AI Software Development Platforms

#29

Post by rowanG077 »

Traster wrote: post #23
rowanG077 wrote: post #8

Earlier quoted context omitted.

This. It's not so hard, any competent software engineer could learn HDLs in one or two weeks. The fucking toolchain though? Months...

Software Engineers can learn HDLs in one or two weeks about as well as hardware engineers can learn C++ in one or two weeks. Will they get to something syntactically correct? Sure. That doesn't mean what they'd be able to write would be useful. And it's not just the toolchain, it's about understanding that HDL isn't a tool for programming FPGAs, it's a tool for programming hardware and FPGAs are one very specific tar…

HDLs are conceptually much, much simpler then C++. HDLs actually are a tool for programming FPGAs, that this is actually programming hardware is an implementation detail.

Re: Xilinx Vitis and Vitis AI Software Development Platforms

#30

Post by rowanG077 »

jhallenworld wrote: post #27
aseipp wrote: post #26

Earlier quoted context omitted.

What does "equivalent power" even mean ? It's completely useless without any qualifiers or specific metrics/goals. My Nvidia GPU also doesn't run x86 programs at the speed of my desktop, but I never expected it to. It's true in the vacuous sense only.

They are all Turing machines, all that matters is can I run my algorithm at higher performance than equivalent priced conventional solutions.

This is incredibly naive. There are algorithm where CPU but GPU easily. There are also algorithms where a GPU beats a CPU easily. There are also algorithms where an FPGA beats a GPU and a CPU easily. You simply can't say x is better then y in general. They all have their own domains.
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