Xilinx Vitis and Vitis AI Software Development Platforms
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Re: Xilinx Vitis and Vitis AI Software Development Platforms
#2Note that all of this is predicated on High Level Synthesis (HLS) becoming real, after many years of industry over-promises and under-deliveries.
A jaded RTL engineer may fairly ask, "what's different this time?" I'm convinced it's two things:
1. These chips have scaled to the point where the toolflow isn't just annoying, it's crippling. (I say that as an RTL designer who likes Vivado, believe it or not.) Making effective use of the largest FPGAs in traditional FPGA applications is difficult enough. Plus, the marginal cost of baking e.g. ARM cores onto an FPGA is now so low that these parts are quickly becoming heterogeneous SoCs and it requires extensive cross-domain knowledge to get a modern design off the ground. More importantly, though, Xilinx is trying to expand FPGAs beyond traditional FPGA markets, and it can't do so without expanding the pool of available talent to program them. Finally, new FPGA applications (e.g. AI) come with their own technical arcana and finding FPGA designers who are proficient in all of these domains is only growing harder. It is necessary for the tools to help, and Xilinx is amply incentivized to pour money into the R&D programs necessary, even if the new tools are simply bundled alongside the old ones.
2. This may be a surprise, but LLVM. Doing HLS correctly is a forced march through every conceivable corner of compiler, language, and RTL design, and to date, that's been much too difficult for EDA companies. I believe that LLVM as an accessible compiler workshop has been instrumental to Xilinx's success to date.
I hope Xilinx does genuinely open-source some of the pieces. (Not the synthesis flow, in this case, but all the stuff built on top of it.) The open-source EDA community is small but motivated and talented, but it's crippled by balkanization caused by the commercial EDA market. This might be an interesting shot in the arm.
Re: Xilinx Vitis and Vitis AI Software Development Platforms
#3Note that all of this is predicated on High Level Synthesis (HLS) becoming real, after many years of industry over-promises and under-deliveries. A jaded RTL engineer may fairly ask, "what's different this time?" I'm convinced it's two things: 1. These chips have scaled to the point where the toolflow isn't just annoying, it's crippling. (I say that as an RTL designer who likes Vivado, believe it or not.) Making effe…
I'm curious: why is FPGA tooling so poor? I used a Spartan-3 over a decade ago for a simple project, and as cursory look it doesn't seem like things have changed much despite the devices becoming significantly more diverse and complicated.
Re: Xilinx Vitis and Vitis AI Software Development Platforms
#4Note that all of this is predicated on High Level Synthesis (HLS) becoming real, after many years of industry over-promises and under-deliveries. A jaded RTL engineer may fairly ask, "what's different this time?" I'm convinced it's two things: 1. These chips have scaled to the point where the toolflow isn't just annoying, it's crippling. (I say that as an RTL designer who likes Vivado, believe it or not.) Making effe…
I'm curious: why is FPGA tooling so poor? I used a Spartan-3 over a decade ago for a simple project, and as cursory look it doesn't seem like things have changed much despite the devices becoming significantly more diverse and complicated.
Mostly because it's (almost) all proprietary. None of the companies are investing in a truly usable solution. It speaks volumes that a handful of developers working for free where able to create a vastly better experience with yosys and friends.
Re: Xilinx Vitis and Vitis AI Software Development Platforms
#5Earlier quoted context omitted.
I'm curious: why is FPGA tooling so poor? I used a Spartan-3 over a decade ago for a simple project, and as cursory look it doesn't seem like things have changed much despite the devices becoming significantly more diverse and complicated.
Mostly because it's (almost) all proprietary. None of the companies are investing in a truly usable solution. It speaks volumes that a handful of developers working for free where able to create a vastly better experience with yosys and friends.
I've always imagined they have a good quality version for military applications, and the bad stuff for everyone else
Re: Xilinx Vitis and Vitis AI Software Development Platforms
#6"The adoption of FPGA technology in the market has always been limited by the severe learning curve required to take advantage of it."
I vehemently disagree with this. FGPAs and their toolchains are notoriously expensive and proprietary. I have no doubt that if tool chains were opened up and an average person could program for it, you would see much more.rapid adoption because then an average person could start the learning curve much easier
Re: Xilinx Vitis and Vitis AI Software Development Platforms
#7Note that all of this is predicated on High Level Synthesis (HLS) becoming real, after many years of industry over-promises and under-deliveries. A jaded RTL engineer may fairly ask, "what's different this time?" I'm convinced it's two things: 1. These chips have scaled to the point where the toolflow isn't just annoying, it's crippling. (I say that as an RTL designer who likes Vivado, believe it or not.) Making effe…
I'm curious: why is FPGA tooling so poor? I used a Spartan-3 over a decade ago for a simple project, and as cursory look it doesn't seem like things have changed much despite the devices becoming significantly more diverse and complicated.
It's not quite fair to say the tooling is flat-out awful. Vivado is much better than ISE. The place/route algorithms matured (analytical placement rather than simulated annealing), and the software it's wrapped in grew up (it's now tcl-driven and much more script- and revision-control-friendly.) Vivado was a heroic effort and Xilinx deserves credit for taking software seriously, and getting so much of it right. If you don't believe me, try hiring an FPGA engineer today to work on an ISE project. You'll get an earful.
That said, a solid, open-source, mixed-language simulator with good SystemVerilog and VHDL-2008 support would change my life. Bonus points if I can embed it in C/C++ code a la Verilator. And, while I'm asking, can it simulate encrypted IP too?
This is one of the places where HLS may sideswipe the traditional RTL market: if you can effectively develop FPGA designs in C++, the entire approach to development/testing/integration changes completely. It may sound like a detail, but it touches every single pain point associated with a complex FPGA design.
Re: Xilinx Vitis and Vitis AI Software Development Platforms
#8"The adoption of FPGA technology in the market has always been limited by the severe learning curve required to take advantage of it." I vehemently disagree with this. FGPAs and their toolchains are notoriously expensive and proprietary. I have no doubt that if tool chains were opened up and an average person could program for it, you would see much more.rapid adoption because then an average person could start the l…
This. It's not so hard, any competent software engineer could learn HDLs in one or two weeks. The fucking toolchain though? Months...
Re: Xilinx Vitis and Vitis AI Software Development Platforms
#9"The adoption of FPGA technology in the market has always been limited by the severe learning curve required to take advantage of it." I vehemently disagree with this. FGPAs and their toolchains are notoriously expensive and proprietary. I have no doubt that if tool chains were opened up and an average person could program for it, you would see much more.rapid adoption because then an average person could start the l…
I also disagree. The main problem is much simpler: they cost too much for fundamental reasons. The die-size for an FPGA that would have equivalent power of an Intel CPU or Nvidia GPU would be huge and expensive.
Re: Xilinx Vitis and Vitis AI Software Development Platforms
#10"The adoption of FPGA technology in the market has always been limited by the severe learning curve required to take advantage of it." I vehemently disagree with this. FGPAs and their toolchains are notoriously expensive and proprietary. I have no doubt that if tool chains were opened up and an average person could program for it, you would see much more.rapid adoption because then an average person could start the l…
I also disagree. The main problem is much simpler: they cost too much for fundamental reasons. The die-size for an FPGA that would have equivalent power of an Intel CPU or Nvidia GPU would be huge and expensive.
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