> Multiple scalars can be packed into one SSE register even in scalar code. This is not the same as vectorization.
They can, but can you honestly call it a common case for scalar code?
> Even then, some arithmetic operations have higher throughput with floats than with doubles.
By far the most (90-99%) of FP computation is additions and multiplications (or fused multiply adds). For scalar case (1 double or float in SSE register), they take precisely as long on modern x86 hardware.
Sure, float div executes in 11 instead of 13-14 clocks for doubles and I'm sure transcendentals are even worse, but they're rarely needed. Even then, if the dependency chain allows, the cost is often OoO scheduled away in integer dominated code.
> Your CPU doesn't execute the ISA directly in hardware, it first converts it into architecture specific micro-ops. That includes FP operations.
Except that SSE instructions pretty much are micro-ops as-is. Despite similarly sounding term, microcode has nothing to do with micro-ops.
> That's not the point. A lot of the time, the cost difference will indeed be irrelevant. The point is that there is a cost difference.
Well, I've written a lot of SSE, AVX etc. SIMD code. There sure is a big difference when you're processing large amounts of data. But... I've seen floats introducing silly precision related bugs [0] and a ton of useless float -> double -> float conversion chains. Most of the time most programmers should default to double.
[0]: Example: https://randomascii.wordpress.com/2012/02/13/dont-store-that...