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Earlier quoted context omitted.
elaborate?
I think they're pointing out that many of the bottlenecks that make computers feel slow can't be fixed by throwing more cores at them—multithreading can be tricky
Good job Microsoft.
Earlier quoted context omitted.
There's already a 64-core Threadripper rumored for the end of this year. Top-tier Ryzen 9 should reach "only" 32 cores on the 5nm process in 2 years.
Is this conjecture or has AMD stated in a roadmap they plan to have 5nm in 2 years?
https://www.tomshardware.com/news/tsmc-5nm-euv-process-node,...
The real question for me with all these AMD releases, what's Intel gonna release? It's surprising to me that Apple didn't announce an AMD based Mac Pro-- the chip Intel gave them must really be something. Too bad though because there could be a lot more of them (eventual Mac Pros) out there I'm guessing if they were using these Rome chips.
It's probably not just the chip, Intel provides financial incentives for manufacturers who build products around their chips.
Apple's relationship with Intel is pretty rocky now. Intel fumbled the i9, their Xeon chips aren't keeping up with AMD's workstation offerings, and their efforts to build a cellular modem chip utterly failed, leaving Apple at the mercy of Qualcomm for that part.
I'm sure Apple will cut loose on Intel as soon as they can. They're probably tired of the bullshit.
Does anyone have an idea how many different processors tapeouts are needed to create this line? It seems reasonable to assume that 48-core chip is just 64-core chip with few defective cores. A lower clocked version is the same ship that high clocked that did not pass some test.
There are three tapeouts used for the entire desktop, HEDT, and server lineup combined. Everything uses the same 8 core CPU dies and there are two different I/O dies- a smaller one used for desktop (which doubles as the X570 chipset) and a big one for HEDT/server. There's also a separate 4 core + GPU die used for laptop parts.
Assuming Zen 2-based Threadripper will still have quad channel memory and 64 PCIe lanes, AMD might go for a medium sized I/O die instead of disabling half of the large server I/O die. Or maybe the Threadripper volume is too low and a separate tapeout is not worth it.
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NUMA isn't a feature, it's a design compromise. Ideally every line of memory takes the same amount of time to access. But in large complex designs, you can increase performance for some memory at the price of lower performance for other memory, aka Non Uniform Memory Access. (These chips do exhibit NUMA)
I believe these chips have Uniform Memory Access via a shared memory interface on the I/O die. Am I mistaken? Edit, just confirmed: >Thanks to this improved design, each chiplet can access the memory with equal latency. The multi-core beasts can support to 4TB of DDR4 memory per socket. https://www.tomshardware.com/news/amd-64-core-128-thread-7nm...
Earlier quoted context omitted.
I believe these chips have Uniform Memory Access via a shared memory interface on the I/O die. Am I mistaken? Edit, just confirmed: >Thanks to this improved design, each chiplet can access the memory with equal latency. The multi-core beasts can support to 4TB of DDR4 memory per socket. https://www.tomshardware.com/news/amd-64-core-128-thread-7nm...
They exhibit NUMA because if chiplet0 wants a line of memory that is held by chiplet4, it has to go get it from chiplet4. So the degree of NUMA is improved from the previous generation, but it is still not UMA.
So there is no longer "near" and "far". In a sense, it's all "far" now (but hopefully not too far). But it is all uniform now.
Just my two cents.
Does anyone have an idea how many different processors tapeouts are needed to create this line? It seems reasonable to assume that 48-core chip is just 64-core chip with few defective cores. A lower clocked version is the same ship that high clocked that did not pass some test.
Two tapeouts, one for the IO die and one for the 8-core chiplet. For lower core count versions they can simply leave chiplet slots blank: https://img.purch.com/o/aHR0cDovL21lZGlhLmJlc3RvZm1pY3JvLmNv...
Epyc IO die will probably be re-used on Threadripper with chiplet slots blank though.
The real question for me with all these AMD releases, what's Intel gonna release? It's surprising to me that Apple didn't announce an AMD based Mac Pro-- the chip Intel gave them must really be something. Too bad though because there could be a lot more of them (eventual Mac Pros) out there I'm guessing if they were using these Rome chips.
I think it'd really only be surprising if the Mac Pro ignored these chips when they were already available. At this point, though, the Mac Pro is shipping before Rome is available. The timing is just off. Current Xeons are faster than current Epyc's on average, so the choice today makes sense. Particularly if Apple wants to avoid NUMA in these machines. It wouldn't be unreasonable for a Mac Pro refresh in 2 years to…