It's still my favorite RISC processor and the only one that I actually liked coding in assembler (SPARC wasn't fun at all).
Alpha is bae. PowerPC is great as long as you don't look at the fever dream nightmare that is it's supervisor state.
MIPS R3000
21–30 of 62 posts
Re: MIPS R3000
#22Alternative history time: what if MIPS R4000 hasn't been killed by Pentium? Would we be running R10000-compatibles now?
Even more fun alternative history: What if Motorola didn't end 68000 with the 68060? 68060 released earlier than the pentium, and regardless it had about twice the performance per clock. But then Motorola decided to abandon 68k to focus on PowerPC. Going further back: What if IBM picked 68000 over the 8086 for the PC? I'm hoping RISC-V will put an end to x86. It's about time.
Check out the Apollo Core. FPGA soft core for an out of order 68k that they call a 68080. Even in an FPGA it's faster than any released 68k.
Re: MIPS R3000
#23I'm honestly confused - why is a wikipedia page about an old computer architecture on the front page of HN?
Re: MIPS R3000
#24I loved this CPU, programming it using spim, then actually getting to write some PSX code.
Re: MIPS R3000
#25I'm honestly confused - why is a wikipedia page about an old computer architecture on the front page of HN?
Because it's interesting! I think it is, at least.
From the guidelines:
> What to Submit
> On-Topic: Anything that good hackers would find interesting. That includes more than hacking and startups. If you had to reduce it to a sentence, the answer might be: anything that gratifies one's intellectual curiosity.
Re: MIPS R3000
#26I remember reading a computer architecture book that used a fictional MIPS instruction set and used washing and drying clothes as an example of how to pipeline / do parallel instructions. Does anyone remember the name of that book?
That might be the DLX architecture used in some of the earlier Patterson and Hennessey texts.
Re: MIPS R3000
#27Earlier quoted context omitted.
Even more fun alternative history: What if Motorola didn't end 68000 with the 68060? 68060 released earlier than the pentium, and regardless it had about twice the performance per clock. But then Motorola decided to abandon 68k to focus on PowerPC. Going further back: What if IBM picked 68000 over the 8086 for the PC? I'm hoping RISC-V will put an end to x86. It's about time.
Check out the Apollo Core. FPGA soft core for an out of order 68k that they call a 68080. Even in an FPGA it's faster than any released 68k. http://www.apollo-core.com/
I'm somewhat familiar with the Apollo Core, as I own a V500v2+.
It's amazing; Too bad it's not open source.
There's some open source 68000 implementations, but they're all still slow. The most well-known is perhaps tg68k, used in MiSTer cores and in FPGA Arcade.
Re: MIPS R3000
#28It's still my favorite RISC processor and the only one that I actually liked coding in assembler (SPARC wasn't fun at all).
Alpha is bae. PowerPC is great as long as you don't look at the fever dream nightmare that is it's supervisor state.
Alpha had a weakly-ordered memory model though.
Re: MIPS R3000
#29Earlier quoted context omitted.
> Even more fun alternative history: What if Motorola didn't end 68000 with the 68060? Well, then we would all be doing our computing on Amigas, or at least on Atari Falcons. People blame C= for the downfall of the Amiga, but Motorola abandoning the 68k line was a much bigger factor, with no immediate way forward being evident at the time.
>People blame C= for the downfall of the Amiga >but Motorola abandoning the 68k line was a much bigger factor The engineers had plans going forward. C= just didn't allow it to happen. They scrapped everything.
That's right. It took Commodore seven years to ship a major revision to the Amiga graphics chips, which had four times the display bandwidth and twice the blitter performance. They should have had a 16-fold performance increase in all categories by that time.
Re: MIPS R3000
#30MIPS is a fun architecture (other than the delay slots that plagued early RISC ISAs) and implementing a subset of it on an FPGA is still a pretty common undergraduate university course project. I was kind of amazed just how simple it is to get a basic CPU working, though even the 1988 version was quite a lot more sophisticated than the class project version (multiple cache levels, having an MMU, probably much better…
Why does everyone seem to hate delay slots? I understand that it makes writing assembly more annoying but most people use a compiler anyway.