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Amazon’s Chips Threaten Intel

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271–280 of 359 posts

Re: Amazon’s Chips Threaten Intel

#271
post #233

Earlier quoted context omitted.

Availability over this year has been about 99.9% for the network, if I need more I can book a server in a different DC and do failovers. There is an SLA you can optionally book. I don't require a data warehouse, load balancers (beyond HAProxy on the same host) or SOC Compliance at the moment, if I need those, I can build them. Not all businesses go for the cheapest option but on the flipside if Amazon costs 80x of ot…

I guess you just downplay the amount of money you spend on developing your own solutions. What does a load balancer do on the same host anyway? Where is this 80x-100x coming from? It would be impossible to create a 100 times cheaper solution because it would mean there is no margin left for the hosting provider.

Loadbalancers are useful for more than balancing load, you can distribute traffic to the different endpoints on them. They're fairly good at it.

80x is on traffic costs alone, I've detailed that above; 80$ for 1TB of traffic on AWS, not including incoming traffic costs, 1$ for 1TB of traffic on Hetzner, incoming traffic is free.

A 16core/64GB instance (m5.4xlarge) on AWS costs 360$ monthly, a tiny bit cheaper if you buy upfront. I pay 50$ a month for 16core/128GB/2TB. The 2TB storage would have to be paid extra on AWS. The m5a.4xlarge is a tad cheaper at 320$ monthly cost, again not counting for storage and bandwidth costs. I get double the RAM and lots of storage for less than 30% of the cost.

So on traffic, it's 80x cheaper, the instance is barely 30% the cost of AWS, and that's not counting the storage costs, which are very high on AWS compared to other providers (OVH, B2). And that only gets cheaper once you buy volume.

Of course the number 80-100x doesn't apply to me personally since I'm running a fairly low-scale operation but this all starts to stack up once you go large. A colo is even cheaper than any of these options since you only pay for power used and for hardware once.

Re: Amazon’s Chips Threaten Intel

#272
post #8

Mike Tyson said: "Everyone has a plan until they get punched in the face." When it comes to semiconductors I'd say: "Everyone wants to make their own chips until they have to do so at scale". (Doesn't roll of the tounge as well!) There is definitely a threat from Apple, Amazon, Google and especially China that will put Intel's market share in target distance, but making chips at scale is incredibly difficult. It's ha…

> Everyone wants to make their own chips until they have to do so at scale

Isn't it exactly the other way around?

Re: Amazon’s Chips Threaten Intel

#273
post #126

Earlier quoted context omitted.

The idea that Intel is “RISC under the hood” is too simplistic. Instructions get decoded and some end up looking like RISC instructions, but there is so much macro- and micro-op fusion going on, as well as reordering, etc, that it is nothing like a RISC machine. (The whole argument is kind of pointless anyway.)

With all the optimizations going on, high performance RISC designs don't look like RISC designs anymore either. The ISA has very little to do with whatever the execution units actually see or execute.

Because the functional units are utilizing microcode? Or do you mean something else?

Re: Amazon’s Chips Threaten Intel

#274
post #82

Earlier quoted context omitted.

But ARM actually has relatively few architectural licensees (~10 as of 2015). In reality, most of their licenses are processor (core+interfaces) or POP (pre-optimized processor designs). https://www.anandtech.com/show/7112/the-arm-diaries-part-1-h...

Could you or someone else elaborate on the different type of licenses and why a company interested in licensing might opt for one over another? I was surprised by the OPs comment that few companies actually license microarchitecture as I thought that's what Apple has been doing with ARM.

It is what Apple has been doing with ARM, but as he said there's only about 10 companies doing this, compared to the hundreds (thousands?) who take the core directly from ARM. Even big players like Qualcomm seem to be moving to just requesting tweaks to the Cortex cores.

It's much, much easier & cheaper to take the premade core rather than developing your own. But your own custom design gives you the ability to differentiate or really target a specific application. See Apple's designs.

Read the Anandtech article, it goes into more detail on the license types. There's also the newer "Built on Cortex" license: https://www.anandtech.com/show/10366/arm-built-on-cortex-lic...

Re: Amazon’s Chips Threaten Intel

#275

Earlier quoted context omitted.

Intel is microarchitecture + fab corporation. They do it all. 1. TSMC (also GlobalFoundries) is fab only. They design the node for the process and way to fabricate it. 2. Then ARM joins with TSMC to develop the high performance microarchitecture for their processor design for TSMC's process. 3. Then ARM licenses the microarchitecture designed for the new processes to Amazon, Apple, Qualcomm who develop their own vari…

Might you or anyone else be able to recommend a book or some literature on business and logistical side of third party chip design like this? Maybe something with some case studies?

Here's a free one that should cover what you're asking about.

https://www.semiwiki.com/forum/content/4729-free-fabless-tra...

Re: Amazon’s Chips Threaten Intel

#276
post #271

Earlier quoted context omitted.

I guess you just downplay the amount of money you spend on developing your own solutions. What does a load balancer do on the same host anyway? Where is this 80x-100x coming from? It would be impossible to create a 100 times cheaper solution because it would mean there is no margin left for the hosting provider.

Loadbalancers are useful for more than balancing load, you can distribute traffic to the different endpoints on them. They're fairly good at it. 80x is on traffic costs alone, I've detailed that above; 80$ for 1TB of traffic on AWS, not including incoming traffic costs, 1$ for 1TB of traffic on Hetzner, incoming traffic is free. A 16core/64GB instance (m5.4xlarge) on AWS costs 360$ monthly, a tiny bit cheaper if you…

To be fair, you should probably account for one or two mirror servers on hetzner for easier, lower latency fail over in case of hw failure (assuming you're talking about dedicated servers, not hetzner cloud). Of course with eg three servers, you might load balance acccross most of those during normal load, just make sure to have enough capacity left over to run with N less servers while you spin up a replacement and/or a disk is replaced etc).

Just for a more apples to apples comparison.

I guess the reason ppl don't "see" the insane premium clouds place on bandwidth is that bandwidth scales up with (presumably paying) customers. So as long as you're not streaming 4k video... You're happy to let the cloud eat out of the bit of your profits that "scales up".

Re: Amazon’s Chips Threaten Intel

#277
post #8

Mike Tyson said: "Everyone has a plan until they get punched in the face." When it comes to semiconductors I'd say: "Everyone wants to make their own chips until they have to do so at scale". (Doesn't roll of the tounge as well!) There is definitely a threat from Apple, Amazon, Google and especially China that will put Intel's market share in target distance, but making chips at scale is incredibly difficult. It's ha…

Delivering almost any package to my house in two days at scale seems a lot harder than making chips at scale and they did that already.

Unfortunately I think making cutting edge chips is harder these days. Just going on cost, the most expensive Amazon fulfillment center comes in at $200 million, the most expensive fab is $14 billion, from Samsung, with word of a $20 billion fab coming from TSMC.

Re: Amazon’s Chips Threaten Intel

#278

Earlier quoted context omitted.

Those profs were still living in 1990 when the x86 tax was still a real issue. As cores get bigger the extra effort involved in handling the x86 ISA gets proportionally smaller. x86 has a accumulated a lot of features over the years and figuring out how, e.g., call gates interact with mis-speculated branches means an x86 design will take more engineering effort than an equivalent RISC design. But with Intel's huge vo…

>"As cores get bigger the extra effort involved in handling the x86 ISA gets proportionally smaller." Can you elaborate on what you mean here? Do you mean as the number of cores gets bigger? Surely the size of the cores has been shrinking no? >"Of course Intel has traditionally always used their volume to be ahead in process technology" What's the correlation between larger volumes and quicker advances in process tec…

When RISC was first introduced its big advantage was that by reducing the number of instructions it could handle the whole processor could be fit onto a single chip whereas CISC chips took multiple chips. In the modern day it takes a lot more transistors and power to decode 4 x86 instructions in one cycle than 4 RISC instructions because you know the RISC instruction are going to start on bytes 0, 4, 8, and 12 whereas the x86 instructions could be starting on any bytes in the window. So you have to look at most of the bytes as if they could be an instruction start until later in the cycle you figure out if they were or not. And any given bit in the instruction might be put to more possible uses increasing the logical depth of the decoder.

But that complexity only goes up linearly with pipeline depth in constrast to structures like the ROB that grow as the square of the depth. So it's not really a big deal. An ARM server is more likely to just slap on 6 decoders to the front end because "why not?" whereas x86 processors will tend to limit themselves to 4 but that very rarely makes any sort of difference in normal code. The decode stage is just a small proportion of the overall transistor and power cost of a deeply pipelined out of order chip.

In, say, dual-issue in-order processors like an A53 the decode tax of an x86 is actually an issue and that's part of why you don't see BIG.little approaches in x86 land and why atom did so poorly in the phone market.

For your second question, yes, spending more money means you can pursue more R&D and tend to bring up new process nodes more quickly. Being ahead means that your competitors can see which approaches worked out and which didn't and so re-direct their research more profitably for a rubber band effect, plus you're all reliant on the same suppliers for input equipment so a given advantage in expenditure tends to lead to finite rather than ever-increasing lead.

Re: Amazon’s Chips Threaten Intel

#279
post #64
post #5

From the article: "Amazon licensed much of the technology from ARM, the company that provides the basic technology for most smartphone chips. It made the chip through TSMC, a Taiwanese company." Amazon became an ARM architecture licensee and had their variant manufactured for them by TSMC. I find the characterization "home grown" as a stretch here, had they designed their own instruction set etc I might agree. That s…

> Amazon became an ARM architecture licensee Does Amazon really have an ARM architecture license? I thought these chips were using stock ARM cores (licensing cores only, not architecture). I asked on HN on the original announcement and it sounded like that was the case: https://news.ycombinator.com/item?id=18553028 Also, I would argue that a custom ISA matters far less than a custom microarchitecture. After all, Inte…

Also curious about this. Would be shocked if Amazon went straightaway for an architecture license.

Re: Amazon’s Chips Threaten Intel

#280

Earlier quoted context omitted.

AMD are in a great place. TSMC's 7nm is in great shape (unlike Intel's 10nm), and AMD's multi-chip architecture allows them to get vastly better effective yields for high-core-count “chips”. They will be selling superior CPU to Intel's and they will be making them at significantly lower cost, while Intel is struggling to compete, stuck with monolithic chips on 14nm.

I have not met anyone who deployed the new AMD stuff at scale and is happy with the outcome. The new architecture shines on small codes like SPEC and then falls apart in large, branchy, pointer-chasing codes that everyone runs in production. I would not say AMD is “in a great place” with their current product. They are putting slight pressure on Intel on the very low end and filling some very specialized niches but t…

Any public sources? Just curious
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