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Towards fearless SIMD

raphlinus.github.io

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Re: Towards fearless SIMD

#81
post #79

> The next-level challenge is compiling multiple alternates into the same binary, and selecting the best at runtime. What are the use cases for having multiple alternates in the same binary? Why not decide them during the compile time for the given architecture? If portability is the concern here, wouldn't it lead to sub-optimal code anyway?

If you're shipping binaries, you don't know the exact architecture in advance (because there are many extensions to x86 and you don't know if the end user is running a new enough processor to use all of them). If you don't use them you are likely leaving performance on the table. So you want to select the fastest option supported by the processor you happen to be running on. You can do this with fairly minimal peform…

I think the question here, which one is better:

1. A portable binary where only individual SIMD operations are optimized for all targets. 2. Building the optimized binary for every target architecture when needed (either by the user or by the binary distributor).

Concern with (1) is, as the number of dynamically called functions (or decided by if-else nests) increases the quality of the generated code reduces for any architecture. Basically, compiler will be left with opaque unrecognizable functions which restricts even the target independent optimizations (Like, GVN, CSE Constant propagation etc).

Let's say, if the user writes a SIMD program which contains full of dynamically called functions (which are opaque to the compiler), doesn't it impact the performance heavily?

Isn't taking the compiler support for optimizing the SIMD operations necessary rather than writing wrapper libraries ? For example, lowering the SIMD operation calls to the existing vectorized math libraries which are recognizable by the compilers ( Example: sin(), cos(), pow() in libm ).

Re: Towards fearless SIMD

#82
post #55

Earlier quoted context omitted.

No, it's not about panicking. It's undefined behavior to run code compiled with CPU features that aren't supported by the current CPU. See: https://github.com/rust-lang/rfcs/blob/master/text/2045-targ... There are some other ideas for making it easier to reason about safety at this level: https://github.com/rust-lang/rfcs/pull/2212 Can you point to where you heard about unsupported SIMD causing a panic? I'd like to f…

I mean that it really shouldn’t be UB to call a function compiled for an unsupported target feature. Following that link, I see two arguments that it’s UB: 1. A multibyte NOP might be used. Supposedly there might be a multibyte NOP that older CPUs will decode as a jump. I am not sure I believe this. Is there an example? 2. int3 might happen, causing SIGTRAP. I see no explanation of how this would occur. So I think th…

I'm not experienced enough in compilers at this level to make a prescriptive argument here. My comment was just intended to be descriptive. I think it would be well worth the effort to dig into the LLVM side of things here to root out the specific reasons for UB. Intuitively though, it makes sense to me that it would be UB. I'd be surprised if it weren't. It seems like it should be reasonable for compilers to assume that the execution of an instruction implies that instruction is supported on the current CPU.

Your type system idea works great for simple cases. It was the very first thing I did in my own SIMD code.

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