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David Patterson Says It’s Time for New Computer Architectures and Languages

spectrum.ieee.org

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Re: David Patterson Says It’s Time for New Computer Architectures and Languages

#2
It's really hard. Remember the Itanium and the Cell. You can build it, but they may not come.

GPUs, though. Those have turned out to be very successful, they can be parallelized as much as you're willing to pay for, and they're good for some non-graphics tasks.

Much of machine learning is a simple repetitive computation running at low precision. Special purpose hardware can do that very well.

So what's the next useful thing in that area?

Re: David Patterson Says It’s Time for New Computer Architectures and Languages

#5
post #2

It's really hard. Remember the Itanium and the Cell. You can build it, but they may not come. GPUs, though. Those have turned out to be very successful, they can be parallelized as much as you're willing to pay for, and they're good for some non-graphics tasks. Much of machine learning is a simple repetitive computation running at low precision. Special purpose hardware can do that very well. So what's the next usefu…

I think that the sitch is different these days. Ideally, you’d have an end-to-end solution (hw, os, compiler). These days you can build an architecture, fork llvm and add a new backend and get Linux running. At that point you can start selling.

Re: David Patterson Says It’s Time for New Computer Architectures and Languages

#7
Are there languages that have first-class support for representing/optimizing memory hierarchy characteristics? Optimizing C compilers, for example, may have extensions to force specific alignments:

https://software.intel.com/en-us/articles/coding-for-perform...

But I'm not aware of languages where e.g. declaring alignments is part of the base language. Awareness of L1, L2, L3 cache characteristics, plus NUMA nodes, is increasingly important to writing high performance code. Every language I've ever used exposes nothing of that hierarchy; it's all just "memory".

People who write performance-critical code are already aware of these issues and can measure/hint/optimize to work with the memory hierarchy in existing languages. But I feel like this could be better if we had languages that modeled these issues up front instead of only exposing the abstracted view. Maybe such languages already exist and I just haven't encountered them yet.

Re: David Patterson Says It’s Time for New Computer Architectures and Languages

#9
post #2

It's really hard. Remember the Itanium and the Cell. You can build it, but they may not come. GPUs, though. Those have turned out to be very successful, they can be parallelized as much as you're willing to pay for, and they're good for some non-graphics tasks. Much of machine learning is a simple repetitive computation running at low precision. Special purpose hardware can do that very well. So what's the next usefu…

Well, past experiences are not that useful right now. I don't think the Itanium or the Cell were great architectures, but it's clear that their most obvious failure mode (mainstream architectures improving faster than them) isn't a showstopper anymore.

For some guess on the next big thing, I would imagine that stuff that avoid the need of memory coherence have nice odds.

Re: David Patterson Says It’s Time for New Computer Architectures and Languages

#10
post #2

It's really hard. Remember the Itanium and the Cell. You can build it, but they may not come. GPUs, though. Those have turned out to be very successful, they can be parallelized as much as you're willing to pay for, and they're good for some non-graphics tasks. Much of machine learning is a simple repetitive computation running at low precision. Special purpose hardware can do that very well. So what's the next usefu…

> Remember the Itanium

Well, why not.

> Q: I feel like deja vu - at Hot Chips, Intel introduced VLIW-concept Itanium that pushed complexity onto the compiler. I see traces of that here. What are you doing to avoid the Itanium traps? How will you avoid IP from Intel?

> A: Itanium was in-order VLIW, hope people will build compiler to get perf. We came from opposite direction - we use dynamic scheduling. We are not VLIW, every node defines sub-graphs and dependent instructions. We designed the compiler first. We build hardware around the compiler, Intel approach the opposite.

https://www.anandtech.com/show/13255/hot-chips-2018-tachyum-...

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