On-Chip Interconnection Architecture of the Tile Processor (2007) [pdf]
1–10 of 14 posts
Re: On-Chip Interconnection Architecture of the Tile Processor (2007) [pdf]
#2Are those things even for sale anymore? Did a (quick) google search and found one on e-bay and that's about it.
Re: On-Chip Interconnection Architecture of the Tile Processor (2007) [pdf]
#3Are those things even for sale anymore? Did a (quick) google search and found one on e-bay and that's about it.
Sort of. Tilera got acquired EZchip Semiconductor who merged with Mellanox Technologies. However, support for the TILE architecture isn't what it used to be.
http://www.mellanox.com/page/multi_core_overview?mtag=multi_...
Re: On-Chip Interconnection Architecture of the Tile Processor (2007) [pdf]
#4Are those things even for sale anymore? Did a (quick) google search and found one on e-bay and that's about it.
Tilera evolved into Mellanox BlueField, although it's not clear whether the tile interconnect is still used. https://www.hpcwire.com/2016/06/01/mellanox-spins-ezchip-acq...
Re: On-Chip Interconnection Architecture of the Tile Processor (2007) [pdf]
#5Ahh Tilera. When MIT's RAW architecture went commercial and became Tilera, it looked like the multicore future was finally coming. They had a lot of nice devtools, like an eclipse-based simulator that let you visualize what was going on in the chip. 64 cores was really appealing, but because they didn't have floating point in the first set of chips, people mainly used them for network processing. Then.. Intel started talking about Larrabee (why use Tilera when you could just run p54c x86), and Nvidia started to become more programmable via Cuda.
Eventually EZChip acquired Tilera (2014), which was then acquired by Mellanox (the hpc network company). Last I saw (2016), Mellanox was using trying to put the tilera stuff in the BlueField products (NVMe over Fabrics target, I think):
https://www.hpcwire.com/2016/06/01/mellanox-spins-ezchip-acq...
Anyone know what happened with BlueField?
Re: On-Chip Interconnection Architecture of the Tile Processor (2007) [pdf]
#6Ahh Tilera. When MIT's RAW architecture went commercial and became Tilera, it looked like the multicore future was finally coming. They had a lot of nice devtools, like an eclipse-based simulator that let you visualize what was going on in the chip. 64 cores was really appealing, but because they didn't have floating point in the first set of chips, people mainly used them for network processing. Then.. Intel started…
BlueField is currently shipping in "smart NICs" and should be shipping as the host processor in storage appliances by the end of the year. It seems to be the cheapest and lowest-power option at the moment for getting PCIe gen 4 IO, compared to IBM's POWER9. They definitely abandoned the approach of having a very large number of weak cores after being acquired, but they're still using a mesh interconnect based on the Tilera IP.
Re: On-Chip Interconnection Architecture of the Tile Processor (2007) [pdf]
#7Ahh Tilera. When MIT's RAW architecture went commercial and became Tilera, it looked like the multicore future was finally coming. They had a lot of nice devtools, like an eclipse-based simulator that let you visualize what was going on in the chip. 64 cores was really appealing, but because they didn't have floating point in the first set of chips, people mainly used them for network processing. Then.. Intel started…
I once found a development motherboard for the RAW processor at a MIT loading dock ( https://flic.kr/p/Fw8cKb ). I always wondered what happened to the project. Thanks for the full history!
Re: On-Chip Interconnection Architecture of the Tile Processor (2007) [pdf]
#8Ahh Tilera. When MIT's RAW architecture went commercial and became Tilera, it looked like the multicore future was finally coming. They had a lot of nice devtools, like an eclipse-based simulator that let you visualize what was going on in the chip. 64 cores was really appealing, but because they didn't have floating point in the first set of chips, people mainly used them for network processing. Then.. Intel started…
You seem to know a lot. Any nice startups in this space?
Re: On-Chip Interconnection Architecture of the Tile Processor (2007) [pdf]
#9Ahh Tilera. When MIT's RAW architecture went commercial and became Tilera, it looked like the multicore future was finally coming. They had a lot of nice devtools, like an eclipse-based simulator that let you visualize what was going on in the chip. 64 cores was really appealing, but because they didn't have floating point in the first set of chips, people mainly used them for network processing. Then.. Intel started…
You seem to know a lot. Any nice startups in this space?
In general purpose parallel processors? Ambric had some interesting tech
Re: On-Chip Interconnection Architecture of the Tile Processor (2007) [pdf]
#10Ahh Tilera. When MIT's RAW architecture went commercial and became Tilera, it looked like the multicore future was finally coming. They had a lot of nice devtools, like an eclipse-based simulator that let you visualize what was going on in the chip. 64 cores was really appealing, but because they didn't have floating point in the first set of chips, people mainly used them for network processing. Then.. Intel started…
I once found a development motherboard for the RAW processor at a MIT loading dock ( https://flic.kr/p/Fw8cKb ). I always wondered what happened to the project. Thanks for the full history!
Hmmm, I think my new how-can-I-figure-out-how-to-do-that might be coming up with creative ways to be a recycling center's loading dock coordinator. More specifically, it sounds like I want to be the person in charge of disposals.
Now to figure out how to make this happen....