Darpa invests $100M in a silicon compiler • Hacker News Board

Re: Darpa invests $100M in a silicon compiler

#261

Post by ur-whale » Mon, Jul 02, 2018, 10:03 AM UTC

cottonseed wrote: post #257

ur-whale wrote: post #191

Earlier quoted context omitted.

These two projects are exactly the road the EDA industry should be taking. Unfortunately, they make very slow progress because they have to painstakingly reverse-engineer everything (with the possible exception of Lattice stuff). For Xilinx chips, where exactly nothing is publicly documented at the lower levels of the stack, they have to spend mountains of time re-discovering everything. Even if I deeply admire the e…

> with the possible exception of Lattice stuff > For Xilinx chips, where exactly nothing is publicly documented at the lower levels of the stack, they have to spend mountains of time re-discovering everything. The situation with Lattice parts was the same; they reverse engineered them.

Thanks, didn't realize that, in my naiveté I thought Lattice actully helped :(

Re: Darpa invests $100M in a silicon compiler

#262

Post by ur-whale » Mon, Jul 02, 2018, 10:07 AM UTC

437598735 wrote: post #258

ur-whale wrote: post #191

Earlier quoted context omitted.

These two projects are exactly the road the EDA industry should be taking. Unfortunately, they make very slow progress because they have to painstakingly reverse-engineer everything (with the possible exception of Lattice stuff). For Xilinx chips, where exactly nothing is publicly documented at the lower levels of the stack, they have to spend mountains of time re-discovering everything. Even if I deeply admire the e…

Note I don't work at Xilinx. And be prepared that what I'm about to write may seem incredibly cynical, sorry. But if I were to take a guess at why the culture is the way it is, I'd say that it's because programmable logic is fundamentally relatively small logic tiles replicated across large areas. That means across competing companies there's a high chance for infringing upon arsenals of patents for rather mundane th…

Thanks for that perspective, I had not considered the angle that the EDA industry is scared of itself because of patents.

Once more, the problem can be traced to the root evil that is patents, sold to the world as essential for innovation, but which end up having the exact opposite effect.

Re: Darpa invests $100M in a silicon compiler

#263

Post by jandrese » Mon, Jul 02, 2018, 7:52 PM UTC

hollerith wrote: post #259

jandrese wrote: post #161

Earlier quoted context omitted.

I don't think the Zumwalt was ever meant to be a mass production ship. I think it was built the prove the concept of lower signature vessels. Notably it's too small and lightly armed to accomplish most Navy objectives. The stealth technology makes it hard to modify for specific objectives. Basically, what are you going to do with a Zumwalt that you couldn't do with a submarine? Is it better at any of those tasks than…

>>I don't think the Zumwalt was ever meant to be a mass production ship You think wrong.

Maybe I should have clarified that the Navy never considered it to be a real ship, for the aforementioned lack of a role in the fleet. Bath Iron Works probably wanted to build hundreds of them but that was little more than a hopeful fantasy on their part.

Re: Darpa invests $100M in a silicon compiler

#264

Post by gascan » Tue, Jul 03, 2018, 12:20 AM UTC

ur-whale wrote: post #189

analognoise wrote: post #121

Earlier quoted context omitted.

Yeah I'm reading these comments and getting a good laugh.

Yup. Thanks for proving my point. This comment of yours is precisely the culture I've experienced when talking / trying to work with EDA folks. Snide comments, mockery, "you sw guys just don't get it", and a general ivory-tower attitude towards everyone who's not in the inner circle.

I'm a hw guy, FWIW that reaction you see might owe a lot to the periodic castigation directed our way over things like, (paraphrasing)

There's a clear need for a Ruby-to-gates compiler, the only possible explanation for why there isn't one is because hw guys just don't get it

Hard not to just throw up your hands.

The sad irony is a lot of the tools, languages, & culture of today's software could really be valuable- for formal verification. But that doesn't get much attention.

Re: Darpa invests $100M in a silicon compiler

#265

Post by hollerith » Wed, Jul 04, 2018, 10:20 PM UTC

jandrese wrote: post #263

hollerith wrote: post #259

Earlier quoted context omitted.

>>I don't think the Zumwalt was ever meant to be a mass production ship You think wrong.

Maybe I should have clarified that the Navy never considered it to be a real ship, for the aforementioned lack of a role in the fleet. Bath Iron Works probably wanted to build hundreds of them but that was little more than a hopeful fantasy on their part.

https://www.nytimes.com/2009/04/09/business/09defense.html states that 10 "were originally planned" though the intro to the wikipedia article says that "the class was intended to take the place of battleships in meeting a congressional mandate for naval fire support," so I'm not going to dispute your clarification because I know that Congress sometimes forces the Navy to buy things the Navy does not want.

Re: Darpa invests $100M in a silicon compiler

#266

Post by phendrenad2 » Thu, Jul 05, 2018, 4:28 PM UTC

mips_avatar wrote: post #38

wcrichton wrote: post #30

My advisor at Stanford is working on an open-source hardware toolchain to solve these exact problems. The Agile Hardware Center is trying to bring software methodologies of rapid prototyping and pervasive code sharing/reuse to ASICs, CGRAs, and FPGAs: https://aha.stanford.edu/

Any tips on getting started with FPGA on custom pcbs?

Power requirements are annoying. You need multiple voltages and they need to ramp up in a certain sequence at a certain ramp rate(!). Study reference designs - find a development board that has the same family of FPGA and also has published schematics and board layout (such as Intel and Xilinx official boards). Then just copy their power layout.

Re: Darpa invests $100M in a silicon compiler

#267

Post by mehrdadn » Fri, Jul 06, 2018, 5:17 AM UTC

pasabagi wrote: post #56

mehrdadn wrote: post #31

Earlier quoted context omitted.

> We are at the top of a power curve with regard to total dollars spent, but we actually about 4th in terms of defense spending as a percent GDP Any reason why percent GDP is the right metric? If we're normalizing I would've expected per capita instead.

Then the Vatican would be topping the charts.

You sure about this? Any citations? I saw somewhere that it'd be Saudi Arabia.

Re: Darpa invests $100M in a silicon compiler

#268

Post by namibj » Fri, Jul 06, 2018, 1:27 PM UTC

xt00 wrote: post #136

namibj wrote: post #117

Earlier quoted context omitted.

Uh, for 90nm you should be in the 4-digit range for a hand full of prototypes.

Oh yea I was totally exaggerating since obviously the prices vary tremendously upon the what you are trying to do. I’ve previously worked for a semiconductor company, so there is sort of a “you can pay as much as you want” option always avail if you want a super awesome mixed signal chip. For the general public, do you have a particular place you are aware of that you would pay the 4 digits for the mask plus few prot…

There is one, from the european network to made to provide semiconductor prototyping for universities. [0]

[0]: http://www.europractice-ic.com/