Darpa invests $100M in a silicon compiler • Hacker News Board

Re: Darpa invests $100M in a silicon compiler

#241

Post by amelius » Sat, Jun 30, 2018, 3:25 PM UTC

ur-whale wrote: post #240

amelius wrote: post #237

Earlier quoted context omitted.

> It's really godawful. Software guys have no idea how good they have it. You can also look at it from the other perspective: at least you can still make money making hardware tooling. That is not possible for software tooling, as everything is open-source already.

>That is not possible for software tooling, as everything is open-source already You have a very distorted view of OpenSource. People working on OpenSource related project do make money. And lots of it. They're just not selling what essentially amounts to obfuscated source code, a way of doing business that is apparently a great source of astonishment for HW folks. The other point is the state of hardware tooling. To…

> People working on OpenSource related project do make money. And lots of it.

I was talking about compilers and such. Do you have any evidence to support this case?

Re: Darpa invests $100M in a silicon compiler

#242

Post by test001only » Sat, Jun 30, 2018, 3:27 PM UTC

Karrot_Kream wrote: post #209

dymk wrote: post #200

Earlier quoted context omitted.

How was that different than ideas found in object oriented programming?

There were folks that believe you could instantiate objects graphically, and just connect them together and wire them up. Take a look at Java Spring Beans, which let you describe object instances through XML that either defines an object instance or wires up other instances together.

What you are mentioning sounds like LabVIEW (http://www.ni.com/en-gb/shop/labview.html). Incidentally it is widely used in semi-conductor industry.

Re: Darpa invests $100M in a silicon compiler

#243

Post by [deleted] » Sat, Jun 30, 2018, 3:35 PM UTC

ur-whale wrote: post #240

amelius wrote: post #237

Earlier quoted context omitted.

> It's really godawful. Software guys have no idea how good they have it. You can also look at it from the other perspective: at least you can still make money making hardware tooling. That is not possible for software tooling, as everything is open-source already.

>That is not possible for software tooling, as everything is open-source already You have a very distorted view of OpenSource. People working on OpenSource related project do make money. And lots of it. They're just not selling what essentially amounts to obfuscated source code, a way of doing business that is apparently a great source of astonishment for HW folks. The other point is the state of hardware tooling. To…

[deleted]

Re: Darpa invests $100M in a silicon compiler

#244

Post by ur-whale » Sat, Jun 30, 2018, 3:36 PM UTC

amelius wrote: post #241

ur-whale wrote: post #240

Earlier quoted context omitted.

>That is not possible for software tooling, as everything is open-source already You have a very distorted view of OpenSource. People working on OpenSource related project do make money. And lots of it. They're just not selling what essentially amounts to obfuscated source code, a way of doing business that is apparently a great source of astonishment for HW folks. The other point is the state of hardware tooling. To…

> People working on OpenSource related project do make money. And lots of it. I was talking about compilers and such. Do you have any evidence to support this case?

>Do you have any evidence to support this case

In the SW world tooling people are busy kick-starting entire industries. You can argue they may be making less money, but as to their overall utility to the ecosystem, clear win AFAIC.

Here's an example:

https://www.infoworld.com/article/3247799/development-tools/...

Where is the LLVM of the HW world?

Re: Darpa invests $100M in a silicon compiler

#245

Post by amelius » Sat, Jun 30, 2018, 3:45 PM UTC

ur-whale wrote: post #244

amelius wrote: post #241

Earlier quoted context omitted.

> People working on OpenSource related project do make money. And lots of it. I was talking about compilers and such. Do you have any evidence to support this case?

>Do you have any evidence to support this case In the SW world tooling people are busy kick-starting entire industries. You can argue they may be making less money, but as to their overall utility to the ecosystem, clear win AFAIC. Here's an example: https://www.infoworld.com/article/3247799/development-tools/... Where is the LLVM of the HW world?

Yes, my entire point was about it being difficult to make money writing SW tooling, like it was in the past (e.g. like Borland made a lot of money selling different kinds of compilers in the 80s and 90s).

Nowadays, I suppose you can still make money writing compilers, but besides being a master at compiler design, you now also have to have the skills to sell your services, which is difficult, time-consuming and boring. You can't just sell shrink-wrapped products like before.

Re: Darpa invests $100M in a silicon compiler

#246

Post by sametmax » Sat, Jun 30, 2018, 6:53 PM UTC

ur-whale wrote: post #14

"Most importantly, we have to change the culture of hardware design. Today, we don’t have open sharing … " This, to the 100th power. The culture in the EDA industry is stuck in the 1950's when it comes to collaboration and sharing, it's very frustrating for newcomers and people who want to learn the trade. As was pointed out by someone in another hardware related HN thread, what can you expect from an industry that i…

They have been some attempt. E.g: the mit project called sirus that used python 2.5 as a dsl to describe high level components you could combine and reuse and then process to generate system c or verilog.

Unfortunaly, while the tool is pretty nice, it never resulted in major adoption (qualcom has some tool using it internally and a few others) and we haven't seen the idea of making reusable libs and components florish.

Somebody would need to find this project and up it to python 3.6. With current tooling, it would make writting code in it really nice and ease the creation of reusable components.

Reusability in raw verilig is hard

Re: Darpa invests $100M in a silicon compiler

#247

Post by cottonseed » Sat, Jun 30, 2018, 6:54 PM UTC

whaaswijk wrote: post #222

I just got back from the Design Automation Conference in San Francisco. It is one of the major EDA conferences. Andreas Olofsson gave a talk about the silicon compiler. There was serious discussion about open source EDA. As far as I could tell it is still unclear what the role of academia will be. It seems tricky to align academic incentives with the implementation, and most importantly, maintenance of an open source…

> Compiling a library of available open source tools is part of the project.

Compiling? What's that even mean? What about funding?

I wrote arachne-pnr, the place and route tool for the icestorm stack. My situation changed, I didn't see a way to fund myself to work on it and I didn't have the time to work on it in my spare time. I assume that's one of the reasons Clifford is planning to use VPR going forward (that, and it is almost certainly more mature, has institutional support at Toronto, etc.) I would have loved to work on EDA tools. I've moved on to other things, but I wonder if these programs will fund the likes of Yosys/SymbiFlow/icestorm/arachne-pnr.

Re: Darpa invests $100M in a silicon compiler

#248

Post by civilitty » Sat, Jun 30, 2018, 7:08 PM UTC

nickpsecurity wrote: post #165

civilitty wrote: post #81

Earlier quoted context omitted.

First, you have to choose your feature size and manufacturer based on your specs because that will lock down your available cell library. Cell libraries are an abstraction over the masks/dopants and describe how to fab the transistors and higher level logic gates, made by each manufacturer for each feature size. STM, TSMC, Global Foundries, etc. have their own cell libraries and each process node gets a different one…

There's also S-ASIC's like eASIC provides on 45nm and 28nm. What do you think about that in today's market? (No affiliation. I find this option interesting with the varied responses I get on the topic. Triad Semi was another interesting option in this space.)

I've only ever made ASICs for high power RF equipment and that was using large feature sizes (>180 nm) in the 90s. I don't think structured ASICs even existed at that point so I can't offer any insights.

The idea is really cool. My go to advice: know your specs, know your vendor, know your delivery guy. If you can implement your design within the restrictions of your chosen structured ASIC, you trust the vendor to deliver on time/in quantity, and you can get them soon enough (I don't know the turn around time) then go for it.

Re: Darpa invests $100M in a silicon compiler

#249

Post by st26 » Sat, Jun 30, 2018, 7:22 PM UTC

ur-whale wrote: post #186

st26 wrote: post #180

Earlier quoted context omitted.

Indeed. But what if every statement in those boatloads of open source software were race conditions, and varied with each machine, frequency, temperature, voltage, workload, etc?

You're saying the problem is harder. I'm more than willing to believe that. Wouldn't you then want ten times the number of people eyeballing the code? And boatloads of free contributers submitting change requests to fix potential problems? And a marketplace of users that can freely choose deciciding which "IP (I still find the term so deeply offensive, I can't help but it I have to put it in quote)?

The key is the solution is so application specific. Write code once, it runs anywhere forever more. But IP blocks are not really like that. Especially advanced IP (USB1.1 vs USB3.1) need to be heavily customized for each application. So John user can't just download a block from Sourceforge and use it.

Re: Darpa invests $100M in a silicon compiler

#250

Post by detuur » Sat, Jun 30, 2018, 7:23 PM UTC

gascan wrote: post #83

detuur wrote: post #75

Earlier quoted context omitted.

You couldn't be any more dead-on. EDA feels like Scientology, where with every level closer to the core you first need to invest half your life savings + a firstborn. I have an FPGA lying on my desk I can do barely anything interesting with because there are no open-source cores for even simple things like USB3.1 controllers or Thunderbolt or pretty much any interesting bus. Protocols are strongly guarded open secret…

because there are no open-source cores for even simple things like USB3.1 controllers or Thunderbolt Those are hardly that simple. There exist entire companies whose function is designing such cores (and licensing them).

Red Hat entirely operates on a business-licensed version of a fundamentally free product. Oracle does pretty much the same. Many large, widely deployed and lucrative software packages are completely open-source. Because there's very few businesses who think that grabbing those packages without vendor support is a good idea. Especially in the EDA industry, with its very sensitive and particular cores, having the source does not guarantee it working, let alone working well. Buying vendor support is cheaper than winging it yourself.

I guarantee you, every single Chinese manufacturer who wants to dodge licensing fees has already done so with stolen IP cores. After all, EDA companies are hopelessly stuck in the past and woefully unaware of proper security practices.