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Darpa invests $100M in a silicon compiler

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Re: Darpa invests $100M in a silicon compiler

#141
post #104
post #50

Earlier quoted context omitted.

On the other hand, every time we fire a cruise missile, we're shooting off the equivalent of an NIH R01-scale research grant.

Serious question: how much of that cost is because we don’t have to fire them more?

The U.S. Navy has apparently bought 8,000 Tomahawk missiles overall and we've shot 2193 of them - but I genuinely don't know when Raytheon's volume discounts kick in.

Re: Darpa invests $100M in a silicon compiler

#142

Earlier quoted context omitted.

What exactly do you mean by "getting started with FPGA on custom PCBs?" Have you made custom PCBs with high density BGAs before? Most non-trivial FPGAs (to me that means you can easily fit a decent softcore processor with space left over for your FPGA logic) will be ball grid arrays and almost impossible to DIY without xray inspection equipment and a reflow oven. You can get what you need for a few hundred $ on eBay…

The project I'm working on right now is with a FLIR tau 2 thermal camera. Our university got it donated but the only decent expansion board is 1400 euro so i figured I might use that budget to build my own. I basically just need to convert LVDS to mipi csi-2 or ethernet. You can find the LVDS spec on page 16 of this spec sheet https://www.flir.com/globalassets/imported-assets/document/f... I need to make a board with…

Man I hate those connectors. I don't have a problem soldering most things down to 0.4mm pitch & 0402 components without magnification, but these connectors love to bridge. Either lay down a (thin!) bead of solder paste, or try drag soldering (I prefer this).

With LVDS, make sure to keep tracks short,have some impedance control (doesn't need to be super strict), and match trace lengths. One issue I had before was a clock (90Mhz I think) that wasn't quite in sync. Ended up ordering a new board with a 8 channel inverter, and snaking the clock through a few of the the gates to get a slight delay.

Re: Darpa invests $100M in a silicon compiler

#143
post #133

Earlier quoted context omitted.

Seems very similar to how Restaurants and grocery stores throw food out instead of giving it to shelters and homeless people. It’s a common corporate policy in the US. The only justification seems to be that if they gave it away, they might miss out on some otherwise potential sales.

I think there's also liability issues, like if they give away food and someone gets salmonella poisoning or has an allergic reaction or something then they could get sued. It sucks but it's not completely arbitrary.

That's a myth. Good Samaritan laws exempt that

Re: Darpa invests $100M in a silicon compiler

#144

Earlier quoted context omitted.

It's not just the EDA industry, it's almost all of hardware including most of the embedded software people. Yeah, I get it - I too am sometimes stuck using some old proprietary compiler with a C standard older than some of the people I work with - but come on. On my last job I used a Qualcomm radio and they ended up giving me close to a thousand zip files of driver revisions going back a decade because their build pr…

> the backoffice engineers would make a build that fixed only those bugs Makes perfect business sense! Those customers didn't pay to get those bugs fixed, so why should they get the fixes??? /s Holy moly.

It's "if it ain't broke, don't fix it."

Re: Darpa invests $100M in a silicon compiler

#145
post #111

Earlier quoted context omitted.

The exact same arguments have been perused ad nauseam by old-timers in the software industry in the 80's and 90's when they clamored against open-source being anti-capitalist and un-american. Not sure how and why H/W is different.

I was thinking this mostly from the standpoint of viral nature of GPL-kind of FOSS licenses. E.g. somehow, somewhere someone manages to inject a GPL licensed IP block into a commercial CPU, after which, with my layman understanding, chip manufacturer now owes under the terms of GPL everyone who happens to have purchased one of those chips a full VHDL, Verilog etc. source code of the entire chip. In software you can a…

That is an absurdly wrong interpretation of both the GPL and how the courts exercise common sense.

Re: Darpa invests $100M in a silicon compiler

#146

"Most importantly, we have to change the culture of hardware design. Today, we don’t have open sharing … " This, to the 100th power. The culture in the EDA industry is stuck in the 1950's when it comes to collaboration and sharing, it's very frustrating for newcomers and people who want to learn the trade. As was pointed out by someone in another hardware related HN thread, what can you expect from an industry that i…

I wonder how a system would turn out in which all electronics/software are forced to have both their diagrams/schematics and code published, but in exchange this is copyrighted for like ~7 years or so.

You are describing the patent system

Re: Darpa invests $100M in a silicon compiler

#147

Earlier quoted context omitted.

I think a reasonable explanation may be that other customers possibly have come to unknowingly rely on some of the bugs. Shipping a fix of all the bugs could actually break their code!

Or their hardware, some of the impact of those bugs could be built into the physical hardware. By that point. Edit:fixed a typo.

Add in qualification of specific hardware inside specific operating conditions.

The "move stuff and break stuff" crowd forgets there's a market for "move slow and rarely break stuff" too.

So if you have qualified hardware w/ a certain driver version, you don't just ship a bunch of code fixes to a customer, you ship the bare minimum change set required to fix any specific issues they experience. Because you're sure as hell not recertifying every part revision with every driver version.

Re: Darpa invests $100M in a silicon compiler

#148

My advisor at Stanford is working on an open-source hardware toolchain to solve these exact problems. The Agile Hardware Center is trying to bring software methodologies of rapid prototyping and pervasive code sharing/reuse to ASICs, CGRAs, and FPGAs: https://aha.stanford.edu/

It’s a bit ironic that a decade or two ago, there was a drive to make software development look more like hardware development (as if it were somehow better), but the trend has swung all the way around.

What was this drive?

Re: Darpa invests $100M in a silicon compiler

#149

Earlier quoted context omitted.

What exactly do you mean by "getting started with FPGA on custom PCBs?" Have you made custom PCBs with high density BGAs before? Most non-trivial FPGAs (to me that means you can easily fit a decent softcore processor with space left over for your FPGA logic) will be ball grid arrays and almost impossible to DIY without xray inspection equipment and a reflow oven. You can get what you need for a few hundred $ on eBay…

The project I'm working on right now is with a FLIR tau 2 thermal camera. Our university got it donated but the only decent expansion board is 1400 euro so i figured I might use that budget to build my own. I basically just need to convert LVDS to mipi csi-2 or ethernet. You can find the LVDS spec on page 16 of this spec sheet https://www.flir.com/globalassets/imported-assets/document/f... I need to make a board with…

I'm curious, my uni satellite club is using the same camera for a cubesat, is that the same domain you're using it for?

Re: Darpa invests $100M in a silicon compiler

#150

Earlier quoted context omitted.

It’s a bit ironic that a decade or two ago, there was a drive to make software development look more like hardware development (as if it were somehow better), but the trend has swung all the way around.

What was this drive?

Using contracts, random verification, and formal verification methods to ensure the integrity of software blocks, I believe. There's still dozens of us out there, heh.
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