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AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

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Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#61

Earlier quoted context omitted.

This "future of programming" was very widely announced in 2005: http://www.gotw.ca/publications/concurrency-ddj.htm

Yes, and in the 90s https://en.wikipedia.org/wiki/Thinking_Machines_Corporation And the 80s https://en.wikipedia.org/wiki/Transputer And, aw heck. We knew it was coming :) https://en.wikipedia.org/wiki/History_of_supercomputing

You forgot this nice one, :)

https://www.parallax.com/catalog/microcontrollers/propeller

https://en.wikipedia.org/wiki/Parallax_Propeller

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#62
post #48

The main issue AMD seems to be solving here is the yields at 7nm and lower processes. Smaller chips means that you get more yield in the presence of errors. Intel builds relatively large 600mm^2 chips (like the XCC aka the 28-core Xeon), but AMD thinks the future is to build networks of ~200mm^2 chips, like what they've done with Zen / Threadripper / EPYC. The advantage for AMD is that they've built a single design:…

> The advantage for AMD is that they've built a single design: the Zeppelin die. RyZen is simply one Zeppelin. Threadripper is two Zeppelins. And EPYC is four Zeppelins. While a popular meme, this is not actually true. Epyc is actually a totally different die, stepping B2 vs the B1 die used in Ryzen+TR. https://en.wikichip.org/wiki/amd/ryzen_7/1800x https://en.wikichip.org/wiki/amd/epyc/7601 The 2700X is actually on…

Are newer Ryzen 1000 series CPUs still made with the B1 die?

I thought steppings were for fixing errata, and once a new revision is qualified, the old one is no longer manufactured.

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#63

Earlier quoted context omitted.

Really the network is the least expensive part. To get IO that can saturate a 10G costs around 20k, while the infiniband card sets you back less than 4k. Now you're talking about 100G, which will go faster, you could easily be looking at a 500k box of ssds.

Wait, what? 10G is 1.2 GByte/s, you can get that from a single SSD easily. 100G is 12 GByte/s, so 5 consumer-level ssds. Squeezing 12 GByte/s over the buses twice might be tricky, but certainly not a 500k problem.

>To get IO that can saturate a 10G costs around 20k

Assuming 10G Ethernet is 8b/10b like a lot of other protocols, that's 1GB/s over 10G Ethernet.

Here's a $130 SSD with 500GB of storage: https://www.amazon.com/Mushkin-PILOT-500GB-Internal-MKNSSDPL...

That's 2600 MB/s read speeds. Or more than double your 10G Ethernet.

------------

RAID0 8 of them together with ASRock's M2. Quad Ultra, and you've got $1040 of SSDs + $200 for the 2x Quad Ultra cards, or just $1200 for 20GB/s read/write speeds. More than enough to saturate any network I'm aware of.

In fact, someone has already done this: http://www.guru3d.com/news-story/eight-nvme-m2-ssds-in-raid-...

They used a higher-end NVM.e SSD and measured 28GB/s (that's capital B, gigaBYTES) on the Threadripper + x399 motherboard.

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#64
post #61

Earlier quoted context omitted.

Yes, and in the 90s https://en.wikipedia.org/wiki/Thinking_Machines_Corporation And the 80s https://en.wikipedia.org/wiki/Transputer And, aw heck. We knew it was coming :) https://en.wikipedia.org/wiki/History_of_supercomputing

You forgot this nice one, :) https://www.parallax.com/catalog/microcontrollers/propeller https://en.wikipedia.org/wiki/Parallax_Propeller

Totally. I wanted one of those so bad - thanks for adding it! :)

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#65
post #62
post #48

Earlier quoted context omitted.

> The advantage for AMD is that they've built a single design: the Zeppelin die. RyZen is simply one Zeppelin. Threadripper is two Zeppelins. And EPYC is four Zeppelins. While a popular meme, this is not actually true. Epyc is actually a totally different die, stepping B2 vs the B1 die used in Ryzen+TR. https://en.wikichip.org/wiki/amd/ryzen_7/1800x https://en.wikichip.org/wiki/amd/epyc/7601 The 2700X is actually on…

Are newer Ryzen 1000 series CPUs still made with the B1 die? I thought steppings were for fixing errata, and once a new revision is qualified, the old one is no longer manufactured.

[deleted]

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#66
post #62
post #48

Earlier quoted context omitted.

> The advantage for AMD is that they've built a single design: the Zeppelin die. RyZen is simply one Zeppelin. Threadripper is two Zeppelins. And EPYC is four Zeppelins. While a popular meme, this is not actually true. Epyc is actually a totally different die, stepping B2 vs the B1 die used in Ryzen+TR. https://en.wikichip.org/wiki/amd/ryzen_7/1800x https://en.wikichip.org/wiki/amd/epyc/7601 The 2700X is actually on…

Are newer Ryzen 1000 series CPUs still made with the B1 die? I thought steppings were for fixing errata, and once a new revision is qualified, the old one is no longer manufactured.

All the Ryzen 1000 processors (including TR) were B1, at least as far as AMD told the USB-IF (and AFAIK nobody ever observed anything else in the wild). Epyc is on B2.

At the time, there was some speculation that B2 might be the "mirror image" die that Epyc uses 2 of.

http://www.usb.org/kcompliance/view/catalog_search/results_b...

http://www.usb.org/kcompliance/view/view_item?item_key=88142...

However, they now report Pinnacle Ridge (Ryzen 2000) as being on the B2 stepping.

Ryzen 2000 is on a slightly updated 12nm process but does not incorporate any library changes. I'm not sure if you could just drop the existing die onto the new process (given that 12nm is really a 14+), or if you could un-flip the die to the proper pinout using the substrate, but it seems like that might be where they moved to the B2 stepping.

But yeah, AMD produced the B1 stepping for an uncommonly long time. At least through the end of 2017, and the first B2 steppings showed up like June 2017.

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#67

Earlier quoted context omitted.

Wait, what? 10G is 1.2 GByte/s, you can get that from a single SSD easily. 100G is 12 GByte/s, so 5 consumer-level ssds. Squeezing 12 GByte/s over the buses twice might be tricky, but certainly not a 500k problem.

>To get IO that can saturate a 10G costs around 20k Assuming 10G Ethernet is 8b/10b like a lot of other protocols, that's 1GB/s over 10G Ethernet. Here's a $130 SSD with 500GB of storage: https://www.amazon.com/Mushkin-PILOT-500GB-Internal-MKNSSDPL... That's 2600 MB/s read speeds. Or more than double your 10G Ethernet. ------------ RAID0 8 of them together with ASRock's M2. Quad Ultra, and you've got $1040 of SSDs +…

10 gigabit Ethernet is 10 gigabits of data. It's mainly Infinband that used a horrible marketing tactic of saying the signal rate instead of the data rate.

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#68

Earlier quoted context omitted.

Wait, what? 10G is 1.2 GByte/s, you can get that from a single SSD easily. 100G is 12 GByte/s, so 5 consumer-level ssds. Squeezing 12 GByte/s over the buses twice might be tricky, but certainly not a 500k problem.

>To get IO that can saturate a 10G costs around 20k Assuming 10G Ethernet is 8b/10b like a lot of other protocols, that's 1GB/s over 10G Ethernet. Here's a $130 SSD with 500GB of storage: https://www.amazon.com/Mushkin-PILOT-500GB-Internal-MKNSSDPL... That's 2600 MB/s read speeds. Or more than double your 10G Ethernet. ------------ RAID0 8 of them together with ASRock's M2. Quad Ultra, and you've got $1040 of SSDs +…

10G is 64b/66b, so somewhat more efficient -> 1.2 GB/s Too fast for single SATA, but any nvme/pcie ssd should give that sustained.

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#69

Earlier quoted context omitted.

>To get IO that can saturate a 10G costs around 20k Assuming 10G Ethernet is 8b/10b like a lot of other protocols, that's 1GB/s over 10G Ethernet. Here's a $130 SSD with 500GB of storage: https://www.amazon.com/Mushkin-PILOT-500GB-Internal-MKNSSDPL... That's 2600 MB/s read speeds. Or more than double your 10G Ethernet. ------------ RAID0 8 of them together with ASRock's M2. Quad Ultra, and you've got $1040 of SSDs +…

10 gigabit Ethernet is 10 gigabits of data. It's mainly Infinband that used a horrible marketing tactic of saying the signal rate instead of the data rate.

PCIe 2.0, USB 2.0, SATA / AHCI, and more protocols are 8b/10b. So all of these protocols were 10-bits per byte.

Modern protocols tend to be 64b/66b or better. So that's why I listed "assuming 8b/10b", its hard to memorize which protocols are which.

Apparently I'm wrong. 10G Ethernet seems to be a more modern 64b/66b in any case.

Re: AMD Tackles Coming “Chiplet” Revolution With New Chip Network Scheme

#70

Earlier quoted context omitted.

10 gigabit Ethernet is 10 gigabits of data. It's mainly Infinband that used a horrible marketing tactic of saying the signal rate instead of the data rate.

PCIe 2.0, USB 2.0, SATA / AHCI, and more protocols are 8b/10b. So all of these protocols were 10-bits per byte. Modern protocols tend to be 64b/66b or better. So that's why I listed "assuming 8b/10b", its hard to memorize which protocols are which. Apparently I'm wrong. 10G Ethernet seems to be a more modern 64b/66b in any case.

10 gigabit ethernet is not 1 GB/s. It's 10 gigabits of data per second, or 1.25 gigabytes per second. The encoding is not an issue with these data rate numbers because Ethernet quotes their data rate as a data rate.
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